From 7b2646536a773f181f766fe755403a242e9f3e8e Mon Sep 17 00:00:00 2001 From: Elyes HAOUAS Date: Tue, 28 Apr 2020 09:46:42 +0200 Subject: [PATCH] util/intelmetool: Fix 16-bit read/write PCI_COMMAND register Change-Id: I3a00db217ce7acd11f979e64bb5d417a8bfc8717 Signed-off-by: Elyes HAOUAS Reviewed-on: https://review.coreboot.org/c/coreboot/+/40790 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi --- util/intelmetool/me.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/util/intelmetool/me.c b/util/intelmetool/me.c index ee2b46a317..e9aa510a10 100644 --- a/util/intelmetool/me.c +++ b/util/intelmetool/me.c @@ -574,7 +574,7 @@ int mkhi_debug_me_memory(void *physaddr) uint32_t intel_mei_setup(struct pci_dev *dev) { struct mei_csr host; - uint32_t reg32; + uint16_t reg16; uint32_t pagerounded; mei_base_address = dev->base_addr[0] & ~0xf; @@ -588,9 +588,9 @@ uint32_t intel_mei_setup(struct pci_dev *dev) } /* Ensure Memory and Bus Master bits are set */ - reg32 = pci_read_long(dev, PCI_COMMAND); - reg32 |= PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY; - pci_write_long(dev, PCI_COMMAND, reg32); + reg16 = pci_read_word(dev, PCI_COMMAND); + reg16 |= PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY; + pci_write_word(dev, PCI_COMMAND, reg16); /* Clean up status for next message */ read_host_csr(&host);