From 7b34e319f2a796446eba6c84fbe970507cc3a1c4 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Michael=20Niew=C3=B6hner?= Date: Sun, 26 Sep 2021 22:04:11 +0200 Subject: [PATCH] soc/intel/common: add SGX fields to GNVS MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add the SGX fields to the GNVS. This is required for Skylake to use the common GNVS. Change-Id: I0077260b7eb1bc2b2fe2af69ac039b38ca0e7423 Signed-off-by: Michael Niewöhner Reviewed-on: https://review.coreboot.org/c/coreboot/+/57947 Tested-by: build bot (Jenkins) Reviewed-by: Angel Pons Reviewed-by: Nico Huber Reviewed-by: Paul Menzel --- src/soc/intel/common/block/acpi/acpi/globalnvs.asl | 3 +++ src/soc/intel/common/block/include/intelblocks/nvs.h | 4 ++++ 2 files changed, 7 insertions(+) diff --git a/src/soc/intel/common/block/acpi/acpi/globalnvs.asl b/src/soc/intel/common/block/acpi/acpi/globalnvs.asl index ab63a5c407..003a5ce3df 100644 --- a/src/soc/intel/common/block/acpi/acpi/globalnvs.asl +++ b/src/soc/intel/common/block/acpi/acpi/globalnvs.asl @@ -25,4 +25,7 @@ Field (GNVS, ByteAcc, NoLock, Preserve) A4GB, 64, // 0x30 - 0x37 Base of above 4GB MMIO Resource A4GS, 64, // 0x38 - 0x3f Length of above 4GB MMIO Resource , 64, // 0x40 - 0x47 Hest log buffer (used in SMM, not ASL code) + EPCS, 8, // 0x48 - SGX enabled status + EMNA, 64, // 0x49 - 0x50 EPC base address + ELNG, 64, // 0x51 - 0x58 EPC length } diff --git a/src/soc/intel/common/block/include/intelblocks/nvs.h b/src/soc/intel/common/block/include/intelblocks/nvs.h index 5adbdb8550..3ebb08b519 100644 --- a/src/soc/intel/common/block/include/intelblocks/nvs.h +++ b/src/soc/intel/common/block/include/intelblocks/nvs.h @@ -27,6 +27,10 @@ struct __packed global_nvs { u64 a4gb; /* 0x30 - 0x37 Base of above 4GB MMIO Resource */ u64 a4gs; /* 0x38 - 0x3f Length of above 4GB MMIO Resource */ u64 hest_log_addr; /* 0x40 - 47 err log addr (used in SMM, not ASL code) */ + /* SGX */ + u8 epcs; /* 0x48 - SGX enabled status */ + u64 emna; /* 0x49 - 0x50 EPC base address */ + u64 elng; /* 0x51 - 0x58 EPC length */ }; #endif