mb/intel/tglrvp: Add PMC.MUX.CONx devices to devicetree for tglrvp_up3
Two usb Type-C ports under the actual mux device. Each port has its own ACPI device entry. These nodes are the ones that the USB Type-C port/connector device will refer to in order to configure the mux. TEST=Verified the scope of PMC.MUX CONx in the SSDT on Tigerlake RVP board. Signed-off-by: John Zhao <john.zhao@intel.com> Change-Id: I7210e00cebe16a5fb8417ac23abad98e574e0982 Reviewed-on: https://review.coreboot.org/c/coreboot/+/42953 Reviewed-by: Caveh Jalali <caveh@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -9,6 +9,7 @@ config BOARD_SPECIFIC_OPTIONS
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select DRIVERS_I2C_HID
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select DRIVERS_I2C_GENERIC
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select DRIVERS_I2C_MAX98373
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select DRIVERS_INTEL_PMC
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select DRIVERS_USB_ACPI
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select DRIVERS_SPI_ACPI
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select GENERATE_SMBIOS_TABLES
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@ -254,7 +254,28 @@ chip soc/intel/tigerlake
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device pci 1e.3 off end # GSPI1 0xA0AB
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device pci 1f.0 on end # eSPI 0xA080 - A09F
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device pci 1f.1 on end # P2SB 0xA0A0
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device pci 1f.2 hidden end # PMC 0xA0A1
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device pci 1f.2 hidden # PMC 0xA0A1
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# The pmc_mux chip driver is a placeholder for the
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# PMC.MUX device in the ACPI hierarchy.
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chip drivers/intel/pmc_mux
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device generic 0 on
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chip drivers/intel/pmc_mux/conn
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register "usb2_port_number" = "6"
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register "usb3_port_number" = "3"
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# SBU is fixed, HSL follows CC
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register "sbu_orientation" = "TYPEC_ORIENTATION_NORMAL"
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device generic 0 on end
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end
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chip drivers/intel/pmc_mux/conn
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register "usb2_port_number" = "7"
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register "usb3_port_number" = "4"
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# SBU is fixed, HSL follows CC
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register "sbu_orientation" = "TYPEC_ORIENTATION_NORMAL"
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device generic 1 on end
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end
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end
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end
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end # PMC
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device pci 1f.3 on end # Intel HD audio 0xA0C8-A0CF
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device pci 1f.4 on end # SMBus 0xA0A3
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device pci 1f.5 on end # SPI 0xA0A4
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