From 7b523a4be90f6e825d1947bdddc86180f72914c7 Mon Sep 17 00:00:00 2001 From: Subrata Banik Date: Wed, 22 Sep 2021 16:46:16 +0530 Subject: [PATCH] soc/intel/alderlake: Use intel_microcode_find() to locate ucode.bin `intel_microcode_find()` function uses cached ucode data hence it would avoid locating ucode.bin from CBFS while passing ucode.bin pointer to FSP. Change-Id: I8f92c9f20dfb055c19c6996e601c8c24767aecb7 Signed-off-by: Subrata Banik Reviewed-on: https://review.coreboot.org/c/coreboot/+/57831 Tested-by: build bot (Jenkins) Reviewed-by: Tim Wawrzynczak --- src/soc/intel/alderlake/fsp_params.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/src/soc/intel/alderlake/fsp_params.c b/src/soc/intel/alderlake/fsp_params.c index ec7bff6829..584364b81e 100644 --- a/src/soc/intel/alderlake/fsp_params.c +++ b/src/soc/intel/alderlake/fsp_params.c @@ -3,6 +3,7 @@ #include #include #include +#include #include #include #include @@ -340,11 +341,12 @@ static void fill_fsps_cpu_params(FSP_S_CONFIG *s_cfg, size_t microcode_len; /* Locate microcode and pass to FSP-S for 2nd microcode loading */ - microcode_file = cbfs_map("cpu_microcode_blob.bin", µcode_len); + microcode_file = intel_microcode_find(); + microcode_len = get_microcode_size(microcode_file); if ((microcode_file != NULL) && (microcode_len != 0)) { /* Update CPU Microcode patch base address/size */ - s_cfg->MicrocodeRegionBase = (uint32_t)microcode_file; + s_cfg->MicrocodeRegionBase = (uint32_t)(uintptr_t)microcode_file; s_cfg->MicrocodeRegionSize = (uint32_t)microcode_len; }