arch: Fix spelling

Change-Id: Ifea10f0180c0c4b684030a168402a95fadf1a9db
Signed-off-by: Martin Roth <martin.roth@se-eng.com>
Reviewed-on: http://review.coreboot.org/3727
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Tested-by: Stefan Reinauer <stefan.reinauer@coreboot.org>

src/arch/armv7/include/armv7.h

@@ -59,7 +59,7 @@
 /*
  * CP15 Barrier instructions
  * Please note that we have separate barrier instructions in ARMv7
- * However, we use the CP15 based instructtions because we use
+ * However, we use the CP15 based instructions because we use
  * -march=armv5 in U-Boot
  */
 #define CP15ISB	asm volatile ("mcr     p15, 0, %0, c7, c5, 4" : : "r" (0))

src/arch/armv7/include/assembler.h

@@ -55,6 +55,6 @@
 #endif
 
 /*
- * Cache alligned
+ * Cache aligned
  */
 #define CALGN(code...) code

src/arch/x86/boot/acpi.c

@@ -248,7 +248,7 @@ void acpi_create_mcfg(acpi_mcfg_t *mcfg)
 }
 
 /*
- * This can be overriden by platform ACPI setup code, if it calls
+ * This can be overridden by platform ACPI setup code, if it calls
  * acpi_create_ssdt_generator().
  */
 unsigned long __attribute__((weak)) acpi_fill_ssdt_generator(
@@ -763,7 +763,7 @@ void acpi_jump_to_wakeup(void *vector)
 #endif
 
 #if CONFIG_SMP
-	// FIXME: This should go into the ACPI backup memory, too. No pork saussages.
+	// FIXME: This should go into the ACPI backup memory, too. No pork sausages.
 	/*
 	 * Just restore the SMP trampoline and continue with wakeup on
 	 * assembly level.

src/arch/x86/boot/tables.c

@@ -66,7 +66,7 @@ struct lb_memory *write_tables(void)
 	rom_table_end =   0xf0000;
 
 	/* Start low addr at 0x500, so we don't run into conflicts with the BDA
-	 * in case our data structures grow beyound 0x400. Only multiboot, GDT
+	 * in case our data structures grow beyond 0x400. Only multiboot, GDT
 	 * and the coreboot table use low_tables.
 	 */
 	low_table_start = 0;

src/arch/x86/include/arch/cpu.h

@@ -8,7 +8,7 @@
  */
 #define X86_EFLAGS_CF	0x00000001 /* Carry Flag */
 #define X86_EFLAGS_PF	0x00000004 /* Parity Flag */
-#define X86_EFLAGS_AF	0x00000010 /* Auxillary carry Flag */
+#define X86_EFLAGS_AF	0x00000010 /* Auxiliary carry Flag */
 #define X86_EFLAGS_ZF	0x00000040 /* Zero Flag */
 #define X86_EFLAGS_SF	0x00000080 /* Sign Flag */
 #define X86_EFLAGS_TF	0x00000100 /* Trap Flag */