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Make MTRR min hole alignment 64MB 

This affects the algorithm when determining when to
transform a range into a larger range with a hole.

It is needed when for when I switch on an 8MB TSEG
and cause the memory maps to go crazy.

Also add header defines for the SMRR.

Change-Id: I1a06ccc28ef139cc79f655a8b19fd3533aca0401
Signed-off-by: Duncan Laurie <dlaurie@google.com>
Reviewed-on: http://review.coreboot.org/765
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
This commit is contained in:
Duncan Laurie 2012-01-09 22:05:18 -08:00 committed by Stefan Reinauer
parent 527fc74a83
commit 7b67892be8
2 changed files with 9 additions and 3 deletions
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9
src/cpu/x86/mtrr/mtrr.c
View File

@ -265,13 +265,16 @@ static unsigned int range_to_mtrr(unsigned int reg,
return reg; return reg;
} }
if (above4gb == 2 && type == MTRR_TYPE_WRBACK && range_sizek % 0x4000) { #define MIN_ALIGN 0x10000 /* 64MB */
if (above4gb == 2 && type == MTRR_TYPE_WRBACK &&
range_sizek > MIN_ALIGN && range_sizek % MIN_ALIGN) {
/* /*
* If this range is not divisible by 16MB then instead * If this range is not divisible then instead
* make a larger range and carve out an uncached hole. * make a larger range and carve out an uncached hole.
*/ */
hole_startk = range_startk + range_sizek; hole_startk = range_startk + range_sizek;
hole_sizek = 0x4000 - (range_sizek % 0x4000); hole_sizek = MIN_ALIGN - (range_sizek % MIN_ALIGN);
range_sizek += hole_sizek; range_sizek += hole_sizek;
} }

3
src/include/cpu/x86/mtrr.h
View File

@ -17,6 +17,9 @@
#define MTRRdefTypeEn (1 << 11) #define MTRRdefTypeEn (1 << 11)
#define MTRRdefTypeFixEn (1 << 10) #define MTRRdefTypeFixEn (1 << 10)
#define SMRRphysBase_MSR 0x1f2
#define SMRRphysMask_MSR 0x1f3
#define MTRRphysBase_MSR(reg) (0x200 + 2 * (reg)) #define MTRRphysBase_MSR(reg) (0x200 + 2 * (reg))
#define MTRRphysMask_MSR(reg) (0x200 + 2 * (reg) + 1) #define MTRRphysMask_MSR(reg) (0x200 + 2 * (reg) + 1)