falco: add rtd2132 settings to device tree
Now that the rtd2132 device has the full settings the panel timings need to be implemented. Sadly, the Tx timings in the rtd2132 aren't 1:1 with the panel's Tx timings. Below is the table equivalent: RTD2132 | Falco Panel --------+------------ T1 | T2 --------+------------ T2 | T8+T10+T12 --------+------------ T3 | T14 --------+------------ T4 | T15 --------+------------ T5 | T9+T11+T13 --------+------------ T6 | T3 --------+------------ T7 | T4 --------+------------ Change-Id: I10a3ad475d6b9485a707eb49e31afd197fc8d24d Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/65858 Reviewed-by: Stefan Reinauer <reinauer@google.com> Reviewed-on: http://review.coreboot.org/4472 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
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@ -110,6 +110,27 @@ chip northbridge/intel/haswell
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device pci 1f.2 on end # SATA Controller
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device pci 1f.3 on # SMBus
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chip drivers/i2c/rtd2132
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# Panel Power Timings (1 ms units)
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# Note: the panel Tx timings are very
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# different from the LVDS bridge
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# Tx timing settings. Below is a mapping
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# for RTD2132 -> Panel timings.
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# T1 = T2
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# T2 = T8 + T10 + T12
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# T3 = T14
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# T4 = T15
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# T5 = T9 + T11 + T13
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# T6 = T3
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# T7 = T4
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register "t1" = "20"
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register "t2" = "16"
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register "t3" = "1"
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register "t4" = "1"
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register "t5" = "16"
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register "t6" = "20"
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register "t7" = "500"
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# LVDS Swap settings are normal.
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register "lvds_swap" = "0"
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# Enable Spread Sprectrum at 1.0%
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register "sscg_percent" = "0x10"
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device i2c 35 on end
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