diff --git a/src/mainboard/google/cherry/mainboard.c b/src/mainboard/google/cherry/mainboard.c index 3fb599b5c8..b69403eb1e 100644 --- a/src/mainboard/google/cherry/mainboard.c +++ b/src/mainboard/google/cherry/mainboard.c @@ -1,6 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ #include +#include #include #include #include @@ -16,6 +17,7 @@ #include #include #include +#include #include #include @@ -29,6 +31,32 @@ #define GPIO_EDP_HPD_1V8 GPIO(GPIO_07) #define GPIO_EN_PP3300_DISP_X GPIO(I2SO1_D2) +bool mainboard_needs_pcie_init(void) +{ + uint32_t sku; + + if (!CONFIG(BOARD_GOOGLE_DOJO)) + return false; + + sku = sku_id(); + switch (sku) { + case 0: + case 1: + case 4: + case 5: + return false; + case 2: + case 3: + case 6: + case 7: + return true; + default: + /* For example CROS_SKU_UNPROVISIONED */ + printk(BIOS_WARNING, "Unexpected sku %#x; assuming PCIe", sku); + return true; + } +} + static void register_reset_to_bl31(void) { static struct bl_aux_param_gpio param_reset = { diff --git a/src/soc/mediatek/mt8195/include/soc/pcie.h b/src/soc/mediatek/mt8195/include/soc/pcie.h index 21a66681e4..aa7502ecf2 100644 --- a/src/soc/mediatek/mt8195/include/soc/pcie.h +++ b/src/soc/mediatek/mt8195/include/soc/pcie.h @@ -4,8 +4,11 @@ #define SOC_MEDIATEK_MT8195_PCIE_H #include +#include void mtk_pcie_reset(uintptr_t reg, bool enable); void mtk_pcie_pre_init(void); +bool mainboard_needs_pcie_init(void); + #endif