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mb/intel/mtlrvp: Remove GPP_A12 for chrome platform 

This patch removes the configuration of GPP_A12 for mtlrvp. Garfield
Peak (WLAN) doesn't use GPP_A12 for WAKE_N. Configuring GPP_A12 pin
prevents system entering G3 (reboots) on issuing shutdown -h now. Hence
configuring GPP_A12 as PAD_NC.

BUG=b:224325352
BRANCH=None
TEST=On issuing 'shutdown -h now' system enters G3

Signed-off-by: Harsha B R <harsha.b.r@intel.com>
Change-Id: I5e46b8afd3e0055440fd3c3db4aa5a9f1d4aa556
Reviewed-on: https://review.coreboot.org/c/coreboot/+/72742
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Reviewed-by: Usha P <usha.p@intel.com>
This commit is contained in:
Harsha B R 2023-02-03 09:58:28 +05:30 committed by Eric Lai
parent 01c8c59364
commit 7b8cbdd76b
1 changed files with 2 additions and 2 deletions
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4
src/mainboard/intel/mtlrvp/variants/baseboard/mtlrvp_p/gpio.c
View File

@ -19,8 +19,8 @@ static const struct pad_config mtl_p_rvp_gpio_table[] = {
/* GPP_A06 : GPP_A06 ==> ESPI_SOC_RESET_L configured on reset, do not touch */
/* GPP_A11: PEG_SLOT_DGPU_SEL_N */
PAD_CFG_GPO(GPP_A11, 1, DEEP),
/* GPP_A12: WIFI_WAKE_N */
PAD_CFG_GPI_SCI(GPP_A12, NONE, DEEP, LEVEL, INVERT),
/* GPP_A12: NC */
PAD_NC(GPP_A12, NONE),
/* GPP_A13: M2_SSD2_RST_N */
PAD_CFG_GPO(GPP_A13, 1, DEEP),
/* GPP_A14: M2_CPU_SSD4_RESET_N */