From 7b97289d56e4758b97ea91990418bc03af14ac5c Mon Sep 17 00:00:00 2001 From: Tim Wawrzynczak Date: Fri, 12 Mar 2021 11:51:31 -0700 Subject: [PATCH] mb/google/brya: Select ADL_ENABLE_USB4_PCIE_RESOURCES for brya0 This change select the Kconfig to pre-allocate the Intel-recommended bus and memory resources per-PCIe TBT root port for the brya0 mainboard. TEST=snippet from dmesg logs shows the correct resources being allocated: PCI: 00:07.0 resource base 27fc00000 size 1c000000 align 20 gran 20 limit 29bbfffff flags 60181202 index 24 PCI: 00:07.0 resource base 83000000 size c200000 align 20 gran 20 limit 8f1fffff flags 60080202 index 20 PCI: 00:07.1 resource base 29bc00000 size 1c000000 align 20 gran 20 limit 2b7bfffff flags 60181202 index 24 PCI: 00:07.1 resource base a0000000 size c200000 align 20 gran 20 limit ac1fffff flags 60080202 index 20 PCI: 00:07.2 resource base 2b7c00000 size 1c000000 align 20 gran 20 limit 2d3bfffff flags 60181202 index 24 PCI: 00:07.2 resource base ac200000 size c200000 align 20 gran 20 limit b83fffff flags 60080202 index 20 Signed-off-by: Tim Wawrzynczak Change-Id: I6b520ae50f19a730263de7918594718f3b4b1c1a Reviewed-on: https://review.coreboot.org/c/coreboot/+/51455 Reviewed-by: Furquan Shaikh Reviewed-by: EricR Lai Tested-by: build bot (Jenkins) --- src/mainboard/google/brya/Kconfig.name | 1 + 1 file changed, 1 insertion(+) diff --git a/src/mainboard/google/brya/Kconfig.name b/src/mainboard/google/brya/Kconfig.name index 2c0e513668..39cda60d45 100644 --- a/src/mainboard/google/brya/Kconfig.name +++ b/src/mainboard/google/brya/Kconfig.name @@ -3,3 +3,4 @@ config BOARD_GOOGLE_BRYA0 select BOARD_GOOGLE_BASEBOARD_BRYA select BASEBOARD_BRYA_LAPTOP select BOARD_ROMSIZE_KB_32768 + select ADL_ENABLE_USB4_PCIE_RESOURCES