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Attached patch adds support for tinybootblock on VT8237* to decode whole flash 

independent of strapping, making larger flashes work. We cannot walk anything
else than PCI bus 0 because HT is not setup yet.

Signed-off-by: Rudolf Marek <r.marek@assembler.cz>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Myles Watson <mylesgw@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5485 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Rudolf Marek 2010-04-23 20:58:13 +00:00
parent 116ec61844
commit 7ba3c4fa09
2 changed files with 51 additions and 0 deletions
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5
src/southbridge/via/vt8237r/Kconfig
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@ -25,3 +25,8 @@ config EPIA_VT8237R_INIT
bool
default n
depends on SOUTHBRIDGE_VIA_VT8237R
config BOOTBLOCK_SOUTHBRIDGE_INIT
string
default "southbridge/via/vt8237r/bootblock.c"
depends on SOUTHBRIDGE_VIA_VT8237R

46
src/southbridge/via/vt8237r/bootblock.c Normal file
View File

@ -0,0 +1,46 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2010 Rudolf Marek <r.marek@assembler.cz>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <arch/io.h>
#include <arch/romcc_io.h>
#include <device/pci_ids.h>
static void bootblock_southbridge_init(void)
{
device_t dev;
/* don't walk other busses, HT is not enabled */
/* ROM decode last 8MB FF800000 - FFFFFFFF on VT8237S/VT8237A */
/* ROM decode last 4MB FFC00000 - FFFFFFFF on VT8237R */
/* Power management controller */
dev = pci_locate_device_on_bus(PCI_ID(PCI_VENDOR_ID_VIA,
PCI_DEVICE_ID_VIA_VT8237R_LPC), 0);
if (dev == PCI_DEV_INVALID) {
/* Power management controller */
dev = pci_locate_device_on_bus(PCI_ID(PCI_VENDOR_ID_VIA,
PCI_DEVICE_ID_VIA_VT8237S_LPC), 0);
if (dev == PCI_DEV_INVALID)
return;
}
pci_write_config8(dev, 0x41, 0x7f);
}