diff --git a/src/mainboard/amd/serengeti_cheetah/romstage.c b/src/mainboard/amd/serengeti_cheetah/romstage.c index 20bf06e9dc..69d7dcdaab 100644 --- a/src/mainboard/amd/serengeti_cheetah/romstage.c +++ b/src/mainboard/amd/serengeti_cheetah/romstage.c @@ -1,8 +1,5 @@ #define SET_NB_CFG_54 1 -//used by incoherent_ht -//#define K8_ALLOCATE_IO_RANGE 1 - //used by init_cpus and fidvid #define SET_FIDVID 0 //if we want to wait for core1 done before DQS training, set it to 0 diff --git a/src/mainboard/gigabyte/ga_2761gxdk/Kconfig b/src/mainboard/gigabyte/ga_2761gxdk/Kconfig index 5e31f5b51c..395c75e5bc 100644 --- a/src/mainboard/gigabyte/ga_2761gxdk/Kconfig +++ b/src/mainboard/gigabyte/ga_2761gxdk/Kconfig @@ -20,6 +20,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy select BOARD_ROMSIZE_KB_512 select RAMINIT_SYSINFO select QRANK_DIMM_SUPPORT + select K8_ALLOCATE_IO_RANGE config MAINBOARD_DIR string diff --git a/src/mainboard/gigabyte/ga_2761gxdk/romstage.c b/src/mainboard/gigabyte/ga_2761gxdk/romstage.c index 30fde6507a..69d068dd3b 100644 --- a/src/mainboard/gigabyte/ga_2761gxdk/romstage.c +++ b/src/mainboard/gigabyte/ga_2761gxdk/romstage.c @@ -21,9 +21,6 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ -#define K8_ALLOCATE_IO_RANGE 1 - - #if CONFIG_LOGICAL_CPUS==1 #define SET_NB_CFG_54 1 #endif diff --git a/src/mainboard/gigabyte/m57sli/Kconfig b/src/mainboard/gigabyte/m57sli/Kconfig index 19855671d6..db8465ee93 100644 --- a/src/mainboard/gigabyte/m57sli/Kconfig +++ b/src/mainboard/gigabyte/m57sli/Kconfig @@ -24,6 +24,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy select BOARD_ROMSIZE_KB_512 select RAMINIT_SYSINFO select QRANK_DIMM_SUPPORT + select K8_ALLOCATE_IO_RANGE config MAINBOARD_DIR string diff --git a/src/mainboard/gigabyte/m57sli/romstage.c b/src/mainboard/gigabyte/m57sli/romstage.c index 3d5f8f9f29..1045a573ab 100644 --- a/src/mainboard/gigabyte/m57sli/romstage.c +++ b/src/mainboard/gigabyte/m57sli/romstage.c @@ -19,9 +19,6 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ -#define K8_ALLOCATE_IO_RANGE 1 - - #if CONFIG_LOGICAL_CPUS==1 #define SET_NB_CFG_54 1 #endif diff --git a/src/mainboard/hp/dl145_g3/Kconfig b/src/mainboard/hp/dl145_g3/Kconfig index 0312a0c93f..b5b75a53f4 100644 --- a/src/mainboard/hp/dl145_g3/Kconfig +++ b/src/mainboard/hp/dl145_g3/Kconfig @@ -22,6 +22,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy select RAMINIT_SYSINFO select SB_HT_CHAIN_UNITID_OFFSET_ONLY select QRANK_DIMM_SUPPORT + select K8_ALLOCATE_IO_RANGE config MAINBOARD_DIR string diff --git a/src/mainboard/hp/dl145_g3/romstage.c b/src/mainboard/hp/dl145_g3/romstage.c index fc7b4310a5..883ee32a2f 100644 --- a/src/mainboard/hp/dl145_g3/romstage.c +++ b/src/mainboard/hp/dl145_g3/romstage.c @@ -25,9 +25,6 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ -#define K8_ALLOCATE_IO_RANGE 1 - - #if CONFIG_LOGICAL_CPUS==1 #define SET_NB_CFG_54 1 #endif diff --git a/src/mainboard/iwill/dk8_htx/romstage.c b/src/mainboard/iwill/dk8_htx/romstage.c index 36a350b3c1..fb5a6b5474 100644 --- a/src/mainboard/iwill/dk8_htx/romstage.c +++ b/src/mainboard/iwill/dk8_htx/romstage.c @@ -1,8 +1,5 @@ #define SET_NB_CFG_54 1 -//used by incoherent_ht -//#define K8_ALLOCATE_IO_RANGE 1 - //used by init_cpus and fidvid #define SET_FIDVID 0 //if we want to wait for core1 done before DQS training, set it to 0 diff --git a/src/mainboard/iwill/dk8s2/romstage.c b/src/mainboard/iwill/dk8s2/romstage.c index 5c9d8251d6..39f60e006e 100644 --- a/src/mainboard/iwill/dk8s2/romstage.c +++ b/src/mainboard/iwill/dk8s2/romstage.c @@ -1,8 +1,5 @@ #define SET_NB_CFG_54 1 -//used by incoherent_ht -//#define K8_ALLOCATE_IO_RANGE 1 - //used by init_cpus and fidvid #define SET_FIDVID 0 //if we want to wait for core1 done before DQS training, set it to 0 diff --git a/src/mainboard/iwill/dk8x/romstage.c b/src/mainboard/iwill/dk8x/romstage.c index 5c9d8251d6..39f60e006e 100644 --- a/src/mainboard/iwill/dk8x/romstage.c +++ b/src/mainboard/iwill/dk8x/romstage.c @@ -1,8 +1,5 @@ #define SET_NB_CFG_54 1 -//used by incoherent_ht -//#define K8_ALLOCATE_IO_RANGE 1 - //used by init_cpus and fidvid #define SET_FIDVID 0 //if we want to wait for core1 done before DQS training, set it to 0 diff --git a/src/mainboard/msi/ms7260/Kconfig b/src/mainboard/msi/ms7260/Kconfig index 06ab891cd6..bd9bbe072b 100644 --- a/src/mainboard/msi/ms7260/Kconfig +++ b/src/mainboard/msi/ms7260/Kconfig @@ -22,6 +22,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy select BOARD_ROMSIZE_KB_512 select RAMINIT_SYSINFO select QRANK_DIMM_SUPPORT + select K8_ALLOCATE_IO_RANGE config MAINBOARD_DIR string diff --git a/src/mainboard/msi/ms7260/romstage.c b/src/mainboard/msi/ms7260/romstage.c index 568dd40e5c..9804518c0d 100644 --- a/src/mainboard/msi/ms7260/romstage.c +++ b/src/mainboard/msi/ms7260/romstage.c @@ -24,7 +24,6 @@ // #define DQS_TRAIN_DEBUG 1 // #define RES_DEBUG 1 -#define K8_ALLOCATE_IO_RANGE 1 #if CONFIG_LOGICAL_CPUS == 1 #define SET_NB_CFG_54 1 #endif diff --git a/src/mainboard/msi/ms9185/romstage.c b/src/mainboard/msi/ms9185/romstage.c index 64fc9cf5fc..bc6ead6a75 100644 --- a/src/mainboard/msi/ms9185/romstage.c +++ b/src/mainboard/msi/ms9185/romstage.c @@ -25,9 +25,6 @@ #define SET_NB_CFG_54 1 -//used by incoherent_ht -//#define K8_ALLOCATE_IO_RANGE 1 - //used by init_cpus and fidvid #define SET_FIDVID 1 //if we want to wait for core1 done before DQS training, set it to 0 diff --git a/src/mainboard/nvidia/l1_2pvv/Kconfig b/src/mainboard/nvidia/l1_2pvv/Kconfig index 65fe514ad9..1dead70a42 100644 --- a/src/mainboard/nvidia/l1_2pvv/Kconfig +++ b/src/mainboard/nvidia/l1_2pvv/Kconfig @@ -23,6 +23,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy select BOARD_ROMSIZE_KB_512 select RAMINIT_SYSINFO select QRANK_DIMM_SUPPORT + select K8_ALLOCATE_IO_RANGE config MAINBOARD_DIR string diff --git a/src/mainboard/nvidia/l1_2pvv/romstage.c b/src/mainboard/nvidia/l1_2pvv/romstage.c index 64d7f8ad37..5cc933d4c0 100644 --- a/src/mainboard/nvidia/l1_2pvv/romstage.c +++ b/src/mainboard/nvidia/l1_2pvv/romstage.c @@ -19,9 +19,6 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ -#define K8_ALLOCATE_IO_RANGE 1 - - #if CONFIG_LOGICAL_CPUS==1 #define SET_NB_CFG_54 1 #endif diff --git a/src/mainboard/sunw/ultra40/Kconfig b/src/mainboard/sunw/ultra40/Kconfig index bbdc0952cf..3b8544b1b0 100644 --- a/src/mainboard/sunw/ultra40/Kconfig +++ b/src/mainboard/sunw/ultra40/Kconfig @@ -17,6 +17,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy select CK804_USE_NIC select CK804_USE_ACI select QRANK_DIMM_SUPPORT + select K8_ALLOCATE_IO_RANGE config MAINBOARD_DIR string diff --git a/src/mainboard/sunw/ultra40/romstage.c b/src/mainboard/sunw/ultra40/romstage.c index fcdddfb23f..b79c49298c 100644 --- a/src/mainboard/sunw/ultra40/romstage.c +++ b/src/mainboard/sunw/ultra40/romstage.c @@ -1,6 +1,3 @@ -#define K8_ALLOCATE_IO_RANGE 1 - - #if CONFIG_LOGICAL_CPUS==1 #define SET_NB_CFG_54 1 #endif diff --git a/src/mainboard/supermicro/h8dme/Kconfig b/src/mainboard/supermicro/h8dme/Kconfig index 2dd3542e67..10fcbb368e 100644 --- a/src/mainboard/supermicro/h8dme/Kconfig +++ b/src/mainboard/supermicro/h8dme/Kconfig @@ -23,6 +23,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy select BOARD_ROMSIZE_KB_1024 select RAMINIT_SYSINFO select QRANK_DIMM_SUPPORT + select K8_ALLOCATE_IO_RANGE config MAINBOARD_DIR string diff --git a/src/mainboard/supermicro/h8dme/romstage.c b/src/mainboard/supermicro/h8dme/romstage.c index 1f300ed90f..cb6d8ecddb 100644 --- a/src/mainboard/supermicro/h8dme/romstage.c +++ b/src/mainboard/supermicro/h8dme/romstage.c @@ -16,9 +16,6 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ -#define K8_ALLOCATE_IO_RANGE 1 - - #if CONFIG_LOGICAL_CPUS==1 #define SET_NB_CFG_54 1 #endif diff --git a/src/mainboard/supermicro/h8dmr/Kconfig b/src/mainboard/supermicro/h8dmr/Kconfig index a152005820..5056446328 100644 --- a/src/mainboard/supermicro/h8dmr/Kconfig +++ b/src/mainboard/supermicro/h8dmr/Kconfig @@ -22,6 +22,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy select BOARD_ROMSIZE_KB_1024 select RAMINIT_SYSINFO select QRANK_DIMM_SUPPORT + select K8_ALLOCATE_IO_RANGE config MAINBOARD_DIR string diff --git a/src/mainboard/supermicro/h8dmr/romstage.c b/src/mainboard/supermicro/h8dmr/romstage.c index fcfe0d871c..4abb4d099e 100644 --- a/src/mainboard/supermicro/h8dmr/romstage.c +++ b/src/mainboard/supermicro/h8dmr/romstage.c @@ -19,9 +19,6 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ -#define K8_ALLOCATE_IO_RANGE 1 - - #if CONFIG_LOGICAL_CPUS==1 #define SET_NB_CFG_54 1 #endif diff --git a/src/mainboard/tyan/s2895/Kconfig b/src/mainboard/tyan/s2895/Kconfig index 94cdb4b9fc..0f8482be2e 100644 --- a/src/mainboard/tyan/s2895/Kconfig +++ b/src/mainboard/tyan/s2895/Kconfig @@ -18,6 +18,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy select HAVE_ACPI_TABLES select BOARD_ROMSIZE_KB_1024 select QRANK_DIMM_SUPPORT + select K8_ALLOCATE_IO_RANGE config MAINBOARD_DIR string diff --git a/src/mainboard/tyan/s2895/romstage.c b/src/mainboard/tyan/s2895/romstage.c index 8d2abb097b..a6eac1bf2b 100644 --- a/src/mainboard/tyan/s2895/romstage.c +++ b/src/mainboard/tyan/s2895/romstage.c @@ -1,6 +1,3 @@ -#define K8_ALLOCATE_IO_RANGE 1 - - #if CONFIG_LOGICAL_CPUS==1 #define SET_NB_CFG_54 1 #endif diff --git a/src/mainboard/tyan/s2912/Kconfig b/src/mainboard/tyan/s2912/Kconfig index 8b519c6d61..4eadd39d1b 100644 --- a/src/mainboard/tyan/s2912/Kconfig +++ b/src/mainboard/tyan/s2912/Kconfig @@ -22,6 +22,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy select BOARD_ROMSIZE_KB_512 select RAMINIT_SYSINFO select QRANK_DIMM_SUPPORT + select K8_ALLOCATE_IO_RANGE config MAINBOARD_DIR string diff --git a/src/mainboard/tyan/s2912/romstage.c b/src/mainboard/tyan/s2912/romstage.c index d632a22c3f..2f0ef20916 100644 --- a/src/mainboard/tyan/s2912/romstage.c +++ b/src/mainboard/tyan/s2912/romstage.c @@ -19,9 +19,6 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ -#define K8_ALLOCATE_IO_RANGE 1 - - #if CONFIG_LOGICAL_CPUS==1 #define SET_NB_CFG_54 1 #endif diff --git a/src/northbridge/amd/amdk8/Kconfig b/src/northbridge/amd/amdk8/Kconfig index 4146239e0d..60b89d3035 100644 --- a/src/northbridge/amd/amdk8/Kconfig +++ b/src/northbridge/amd/amdk8/Kconfig @@ -53,6 +53,10 @@ config QRANK_DIMM_SUPPORT bool default n +config K8_ALLOCATE_IO_RANGE + bool + default n + if K8_REV_F_SUPPORT config DIMM_DDR2 diff --git a/src/northbridge/amd/amdk8/incoherent_ht.c b/src/northbridge/amd/amdk8/incoherent_ht.c index 46e696adbf..534951aa6e 100644 --- a/src/northbridge/amd/amdk8/incoherent_ht.c +++ b/src/northbridge/amd/amdk8/incoherent_ht.c @@ -11,10 +11,6 @@ #define CONFIG_K8_HT_FREQ_1G_SUPPORT 0 #endif -#ifndef K8_ALLOCATE_IO_RANGE - #define K8_ALLOCATE_IO_RANGE 0 -#endif - // Do we need allocate MMIO? Current We direct last 64M to sblink only, We can not lose access to last 4M range to ROM #ifndef K8_ALLOCATE_MMIO_RANGE #define K8_ALLOCATE_MMIO_RANGE 0 @@ -720,7 +716,7 @@ static int ht_setup_chains_x(void) uint8_t next_busn; uint8_t ht_c_num; uint8_t nodes; -#if K8_ALLOCATE_IO_RANGE == 1 +#if CONFIG_K8_ALLOCATE_IO_RANGE unsigned next_io_base; #endif @@ -740,7 +736,7 @@ static int ht_setup_chains_x(void) next_busn=0x3f+1; /* 0 will be used ht chain with SB we need to keep SB in bus0 in auto stage*/ -#if K8_ALLOCATE_IO_RANGE == 1 +#if CONFIG_K8_ALLOCATE_IO_RANGE /* io range allocation */ tempreg = 0 | (((reg>>8) & 0x3) << 4 )| (0x3<<12); //limit pci_write_config32(PCI_DEV(0, 0x18, 1), 0xC4, tempreg); @@ -753,7 +749,7 @@ static int ht_setup_chains_x(void) for(ht_c_num=1;ht_c_num<4; ht_c_num++) { pci_write_config32(PCI_DEV(0, 0x18, 1), 0xe0 + ht_c_num * 4, 0); -#if K8_ALLOCATE_IO_RANGE == 1 +#if CONFIG_K8_ALLOCATE_IO_RANGE /* io range allocation */ pci_write_config32(PCI_DEV(0, 0x18, 1), 0xc4 + ht_c_num * 8, 0); pci_write_config32(PCI_DEV(0, 0x18, 1), 0xc0 + ht_c_num * 8, 0); @@ -786,7 +782,7 @@ static int ht_setup_chains_x(void) pci_write_config32(PCI_DEV(0, 0x18, 1), 0xe0 + ht_c_num * 4, tempreg); next_busn+=0x3f+1; -#if K8_ALLOCATE_IO_RANGE == 1 +#if CONFIG_K8_ALLOCATE_IO_RANGE /* io range allocation */ tempreg = nodeid | (linkn<<4) | ((next_io_base+0x3)<<12); //limit pci_write_config32(PCI_DEV(0, 0x18, 1), 0xC4 + ht_c_num * 8, tempreg); @@ -810,7 +806,7 @@ static int ht_setup_chains_x(void) pci_write_config32(dev, regpos, reg); } -#if K8_ALLOCATE_IO_RANGE == 1 +#if CONFIG_K8_ALLOCATE_IO_RANGE /* io range allocation */ for(i = 0; i< 4; i++) { unsigned regpos;