Eagleheights DSDT: Grant OS control through OSC
Change the OSC method to actually grant control of PCIe capabilities to the OS instead of granting no control. I believe the logic was backwards in the original commit. Bits should be set when granting control and cleared when not granting control. By setting the return value to 0x00, we effectively tell the OS that it cannot control any PCIe capability. See section 6.2.9 of the ACPI spec version 3.0 for more information. This edit is a duplication of the OSC method that is in the src/southbridge/intel/bd82x6x/pch.asl file. Change-Id: Id2462ab12203afceb9033f24d06b4dfbf2236d2e Signed-off-by: Mike Loptien <mike.loptien@se-eng.com> Reviewed-on: http://review.coreboot.org/2714 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
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Subproject commit ba8caa30bd5ed6d89dbfd40e17c75c94d43804c6
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Subproject commit dac1a18d184976e4447b98479f0b7a172054b98f
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@ -181,46 +181,7 @@ DefinitionBlock ("DSDT", "DSDT", 1, "EAGLE", "COREBOOT", 0x0000001)
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/* Check for proper GUID */
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/* Check for proper GUID */
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If (LEqual (Arg0, ToUUID("33DB4D5B-1FF7-401C-9657-7441C03DD766")))
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If (LEqual (Arg0, ToUUID("33DB4D5B-1FF7-401C-9657-7441C03DD766")))
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{
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{
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/* Create DWORD-adressable field from the Capabilities Buffer */
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/* Let OS control everything */
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CreateDWordField (Arg3, 0, CDW1)
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CreateDWordField (Arg3, 4, CDW2)
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CreateDWordField (Arg3, 8, CDW3)
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/* Save Capabilities DWord 2 & 3 */
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Store (CDW2, SUPP)
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Store (CDW3, CTRL)
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/* Don't care of OS capabilites */
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/* We support nothing (maybe we should add PCIe Capability Structure Control) */
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And (CTRL, 0x00, CTRL)
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/* Query flag clear ? */
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If (Not (And (CDW1, 1)))
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{
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/* Nothing to do */
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}
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/* Unknown revision ? */
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If (LNotEqual (Arg1, One))
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{
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Or (CDW1, 0x08, CDW1)
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}
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/* Capabilities bits masked ? */
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If (LNotEqual (CDW3, CTRL))
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{
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Or (CDW1, 0x10, CDW1)
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}
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/* Update DWORD3 in the buffer */
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Store (CTRL, CDW3)
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Return (Arg3)
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}
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Else
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{
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/* Unrecognized UUID */
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Or (CDW1, 4, CDW1)
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Return (Arg3)
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Return (Arg3)
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}
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}
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} /* End _OSC */
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} /* End _OSC */
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