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This trivial patch adds the SMSC SCH3112 Super I/O chip ID to the 

generic SMSC support, and corrects a small typo.

With this patch, coreboot v2 on a mainboard with SCH3112 has been
demonstrated to correctly use the serial port.  No other chip
functions were tested.

Signed-off-by: Christopher Kilgour <techie@whiterocker.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3244 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Christopher Kilgour 2008-04-19 13:32:19 +00:00 committed by Uwe Hermann
parent 5971121009
commit 7bc63fd2cb
2 changed files with 3 additions and 1 deletions
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2
src/superio/smsc/smscsuperio/smscsuperio_early_serial.c
View File

@ -30,7 +30,7 @@
* Enable the specified serial port.
*
* @param dev The device to use.
* @param dev The I/O base of the serial port (usually 0x3f8/0x2f8).
* @param iobase The I/O base of the serial port (usually 0x3f8/0x2f8).
*/
static inline void smscsuperio_enable_serial(device_t dev, uint16_t iobase)
{

2
src/superio/smsc/smscsuperio/superio.c
View File

@ -56,6 +56,7 @@
#define LPC47B397 0x6f
#define A8000 0x77 /* ASUS A8000, a rebranded DME1737(?) */
#define DME1737 0x78
#define SCH3112 0x7c
#define SCH5307 0x81 /* Rebranded LPC47B397(?) */
/* Register defines */
@ -127,6 +128,7 @@ static const struct logical_devices {
{LPC47B397,{0, 3, 4, 5, -1, 7, -1, -1, 8, -1, -1, -1, 10, -1, -1}},
{A8000, {0, 3, 4, 5, -1, 7, -1, -1, -1, -1, -1, -1, 10, -1, -1}},
{DME1737, {0, 3, 4, 5, -1, 7, -1, -1, -1, -1, -1, -1, 10, -1, -1}},
{SCH3112, {0, 3, 4, 5, -1, 7, -1, -1, -1, -1, -1, -1, 10, -1, -1}},
{SCH5307, {0, 3, 4, 5, -1, 7, -1, -1, 8, -1, -1, -1, 10, -1, -1}},
};