From 7bddd30e948e6c3856336e77221fdbe5ba749453 Mon Sep 17 00:00:00 2001 From: Patrick Rudolph Date: Sat, 11 Jun 2016 18:39:35 +0200 Subject: [PATCH] nb/intel/sandybridge/raminit: Allow 933Mhz on Lenovo devices Set max_mem_clock_mhz in devicetree to 933Mhz. Allows to run the memory at up to DDR3-1866. The same frequency was allowed within the first vendor bios, but Lenovo than decided to limit it to DDR3-1333. Tested on Lenovo T520 and DDR3-1600 DIMM (RMT3170eb86e9w16). The RAM is now running at DDR3-1600 instead of DDR3-1333. This gives about 4% performance increase in glmark2 using the Intel GPU. Change-Id: If15be497402d84a2778f0434b6381a64eda832d6 Signed-off-by: Patrick Rudolph Reviewed-on: https://review.coreboot.org/15158 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel Reviewed-by: Martin Roth --- src/mainboard/lenovo/t420/devicetree.cb | 3 +++ src/mainboard/lenovo/t420s/devicetree.cb | 3 +++ src/mainboard/lenovo/t430s/devicetree.cb | 3 +++ src/mainboard/lenovo/t520/devicetree.cb | 3 +++ src/mainboard/lenovo/t530/devicetree.cb | 3 +++ src/mainboard/lenovo/x220/devicetree.cb | 3 +++ src/mainboard/lenovo/x230/devicetree.cb | 3 +++ src/northbridge/intel/sandybridge/raminit.c | 6 +++++- 8 files changed, 26 insertions(+), 1 deletion(-) diff --git a/src/mainboard/lenovo/t420/devicetree.cb b/src/mainboard/lenovo/t420/devicetree.cb index 809e3eed22..a921f765cb 100644 --- a/src/mainboard/lenovo/t420/devicetree.cb +++ b/src/mainboard/lenovo/t420/devicetree.cb @@ -18,6 +18,9 @@ chip northbridge/intel/sandybridge register "gpu_cpu_backlight" = "0x1155" register "gpu_pch_backlight" = "0x06100610" + # Override fuse bits that hard-code the value to 666 Mhz + register "max_mem_clock_mhz" = "933" + device cpu_cluster 0 on chip cpu/intel/socket_rPGA988B device lapic 0 on end diff --git a/src/mainboard/lenovo/t420s/devicetree.cb b/src/mainboard/lenovo/t420s/devicetree.cb index 841e6753d1..24f9ebd709 100644 --- a/src/mainboard/lenovo/t420s/devicetree.cb +++ b/src/mainboard/lenovo/t420s/devicetree.cb @@ -17,6 +17,9 @@ chip northbridge/intel/sandybridge register "gpu_cpu_backlight" = "0x1155" register "gpu_pch_backlight" = "0x06100610" + # Override fuse bits that hard-code the value to 666 Mhz + register "max_mem_clock_mhz" = "933" + device cpu_cluster 0 on chip cpu/intel/socket_rPGA988B device lapic 0 on end diff --git a/src/mainboard/lenovo/t430s/devicetree.cb b/src/mainboard/lenovo/t430s/devicetree.cb index d1cea3cc06..54846bef0a 100644 --- a/src/mainboard/lenovo/t430s/devicetree.cb +++ b/src/mainboard/lenovo/t430s/devicetree.cb @@ -17,6 +17,9 @@ chip northbridge/intel/sandybridge register "gpu_cpu_backlight" = "0x1155" register "gpu_pch_backlight" = "0x11551155" + # Override fuse bits that hard-code the value to 666 Mhz + register "max_mem_clock_mhz" = "933" + device cpu_cluster 0 on chip cpu/intel/socket_rPGA989 device lapic 0 on end diff --git a/src/mainboard/lenovo/t520/devicetree.cb b/src/mainboard/lenovo/t520/devicetree.cb index c0292ec3fd..6c638e5d36 100644 --- a/src/mainboard/lenovo/t520/devicetree.cb +++ b/src/mainboard/lenovo/t520/devicetree.cb @@ -18,6 +18,9 @@ chip northbridge/intel/sandybridge register "gpu_cpu_backlight" = "0x1155" register "gpu_pch_backlight" = "0x06100610" + # Override fuse bits that hard-code the value to 666 Mhz + register "max_mem_clock_mhz" = "933" + device cpu_cluster 0 on chip cpu/intel/socket_rPGA988B device lapic 0 on end diff --git a/src/mainboard/lenovo/t530/devicetree.cb b/src/mainboard/lenovo/t530/devicetree.cb index 43d8264e3d..07312515db 100644 --- a/src/mainboard/lenovo/t530/devicetree.cb +++ b/src/mainboard/lenovo/t530/devicetree.cb @@ -18,6 +18,9 @@ chip northbridge/intel/sandybridge register "gpu_cpu_backlight" = "0x1155" register "gpu_pch_backlight" = "0x11551155" + # Override fuse bits that hard-code the value to 666 Mhz + register "max_mem_clock_mhz" = "933" + device cpu_cluster 0 on chip cpu/intel/socket_rPGA989 device lapic 0 on end diff --git a/src/mainboard/lenovo/x220/devicetree.cb b/src/mainboard/lenovo/x220/devicetree.cb index af70b2021e..78a65a8825 100644 --- a/src/mainboard/lenovo/x220/devicetree.cb +++ b/src/mainboard/lenovo/x220/devicetree.cb @@ -18,6 +18,9 @@ chip northbridge/intel/sandybridge register "gpu_cpu_backlight" = "0x1155" register "gpu_pch_backlight" = "0x06100610" + # Override fuse bits that hard-code the value to 666 Mhz + register "max_mem_clock_mhz" = "933" + device cpu_cluster 0 on chip cpu/intel/socket_rPGA989 device lapic 0 on end diff --git a/src/mainboard/lenovo/x230/devicetree.cb b/src/mainboard/lenovo/x230/devicetree.cb index f0c940d736..a8341fc2ea 100644 --- a/src/mainboard/lenovo/x230/devicetree.cb +++ b/src/mainboard/lenovo/x230/devicetree.cb @@ -18,6 +18,9 @@ chip northbridge/intel/sandybridge register "gpu_cpu_backlight" = "0x1155" register "gpu_pch_backlight" = "0x11551155" + # Override fuse bits that hard-code the value to 666 Mhz + register "max_mem_clock_mhz" = "933" + device cpu_cluster 0 on chip cpu/intel/socket_rPGA989 device lapic 0 on end diff --git a/src/northbridge/intel/sandybridge/raminit.c b/src/northbridge/intel/sandybridge/raminit.c index 4563547c79..15590d1da5 100644 --- a/src/northbridge/intel/sandybridge/raminit.c +++ b/src/northbridge/intel/sandybridge/raminit.c @@ -4374,7 +4374,11 @@ static unsigned int get_mem_min_tck(void) } return DEFAULT_TCK; } else { - if (cfg->max_mem_clock_mhz >= 800) + if (cfg->max_mem_clock_mhz >= 1066) + return TCK_1066MHZ; + else if (cfg->max_mem_clock_mhz >= 933) + return TCK_933MHZ; + else if (cfg->max_mem_clock_mhz >= 800) return TCK_800MHZ; else if (cfg->max_mem_clock_mhz >= 666) return TCK_666MHZ;