soc/intel/{jsl,tgl}: Rename PcdDebugInterfaceFlags macros for better understanding
BIT 1 -> DEBUG_INTERFACE_UART_8250IO BIT 4 -> DEBUG_INTERFACE_LPSS_SERIAL_IO Change-Id: I566b9dc82b2289af42e58705ebeee51179886f1f Signed-off-by: Subrata Banik <subrata.banik@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/40904 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Wonkyu Kim <wonkyu.kim@intel.com>
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@ -201,9 +201,9 @@ struct soc_intel_jasperlake_config {
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/* Debug interface selection */
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enum {
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DEBUG_INTERFACE_RAM = (1 << 0),
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DEBUG_INTERFACE_UART = (1 << 1),
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DEBUG_INTERFACE_UART_8250IO = (1 << 1),
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DEBUG_INTERFACE_USB3 = (1 << 3),
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DEBUG_INTERFACE_SERIAL_IO = (1 << 4),
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DEBUG_INTERFACE_LPSS_SERIAL_IO = (1 << 4),
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DEBUG_INTERFACE_TRACEHUB = (1 << 5),
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} debug_interface_flag;
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@ -60,7 +60,7 @@ static void soc_memory_init_params(FSP_M_CONFIG *m_cfg,
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/* Set debug interface flags */
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m_cfg->PcdDebugInterfaceFlags = CONFIG(DRIVERS_UART_8250IO) ?
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DEBUG_INTERFACE_UART : DEBUG_INTERFACE_SERIAL_IO;
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DEBUG_INTERFACE_UART_8250IO : DEBUG_INTERFACE_LPSS_SERIAL_IO;
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/* TraceHub configuration */
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dev = pcidev_path_on_root(PCH_DEVFN_TRACEHUB);
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@ -198,9 +198,9 @@ struct soc_intel_tigerlake_config {
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/* Debug interface selection */
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enum {
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DEBUG_INTERFACE_RAM = (1 << 0),
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DEBUG_INTERFACE_UART = (1 << 1),
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DEBUG_INTERFACE_UART_8250IO = (1 << 1),
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DEBUG_INTERFACE_USB3 = (1 << 3),
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DEBUG_INTERFACE_SERIAL_IO = (1 << 4),
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DEBUG_INTERFACE_LPSS_SERIAL_IO = (1 << 4),
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DEBUG_INTERFACE_TRACEHUB = (1 << 5),
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} debug_interface_flag;
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@ -71,7 +71,7 @@ static void soc_memory_init_params(FSP_M_CONFIG *m_cfg,
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/* Set debug interface flags */
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m_cfg->PcdDebugInterfaceFlags = CONFIG(DRIVERS_UART_8250IO) ?
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DEBUG_INTERFACE_UART : DEBUG_INTERFACE_SERIAL_IO;
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DEBUG_INTERFACE_UART_8250IO : DEBUG_INTERFACE_LPSS_SERIAL_IO;
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/* TraceHub configuration */
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dev = pcidev_path_on_root(PCH_DEVFN_TRACEHUB);
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