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soc/intel/{jsl,tgl}: Rename PcdDebugInterfaceFlags macros for better understanding 

BIT 1 -> DEBUG_INTERFACE_UART_8250IO
BIT 4 -> DEBUG_INTERFACE_LPSS_SERIAL_IO

Change-Id: I566b9dc82b2289af42e58705ebeee51179886f1f
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40904
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Wonkyu Kim <wonkyu.kim@intel.com>
This commit is contained in:
Subrata Banik 2020-04-30 12:23:16 +05:30 committed by Patrick Georgi
parent 1d17529954
commit 7be0df8dd3
4 changed files with 6 additions and 6 deletions
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4
src/soc/intel/jasperlake/chip.h
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@ -201,9 +201,9 @@ struct soc_intel_jasperlake_config {
/* Debug interface selection */ /* Debug interface selection */
enum { enum {
DEBUG_INTERFACE_RAM = (1 << 0), DEBUG_INTERFACE_RAM = (1 << 0),
DEBUG_INTERFACE_UART = (1 << 1), DEBUG_INTERFACE_UART_8250IO = (1 << 1),
DEBUG_INTERFACE_USB3 = (1 << 3), DEBUG_INTERFACE_USB3 = (1 << 3),
DEBUG_INTERFACE_SERIAL_IO = (1 << 4), DEBUG_INTERFACE_LPSS_SERIAL_IO = (1 << 4),
DEBUG_INTERFACE_TRACEHUB = (1 << 5), DEBUG_INTERFACE_TRACEHUB = (1 << 5),
} debug_interface_flag; } debug_interface_flag;

2
src/soc/intel/jasperlake/romstage/fsp_params.c
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@ -60,7 +60,7 @@ static void soc_memory_init_params(FSP_M_CONFIG *m_cfg,
/* Set debug interface flags */ /* Set debug interface flags */
m_cfg->PcdDebugInterfaceFlags = CONFIG(DRIVERS_UART_8250IO) ? m_cfg->PcdDebugInterfaceFlags = CONFIG(DRIVERS_UART_8250IO) ?
DEBUG_INTERFACE_UART : DEBUG_INTERFACE_SERIAL_IO; DEBUG_INTERFACE_UART_8250IO : DEBUG_INTERFACE_LPSS_SERIAL_IO;
/* TraceHub configuration */ /* TraceHub configuration */
dev = pcidev_path_on_root(PCH_DEVFN_TRACEHUB); dev = pcidev_path_on_root(PCH_DEVFN_TRACEHUB);

4
src/soc/intel/tigerlake/chip.h
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@ -198,9 +198,9 @@ struct soc_intel_tigerlake_config {
/* Debug interface selection */ /* Debug interface selection */
enum { enum {
DEBUG_INTERFACE_RAM = (1 << 0), DEBUG_INTERFACE_RAM = (1 << 0),
DEBUG_INTERFACE_UART = (1 << 1), DEBUG_INTERFACE_UART_8250IO = (1 << 1),
DEBUG_INTERFACE_USB3 = (1 << 3), DEBUG_INTERFACE_USB3 = (1 << 3),
DEBUG_INTERFACE_SERIAL_IO = (1 << 4), DEBUG_INTERFACE_LPSS_SERIAL_IO = (1 << 4),
DEBUG_INTERFACE_TRACEHUB = (1 << 5), DEBUG_INTERFACE_TRACEHUB = (1 << 5),
} debug_interface_flag; } debug_interface_flag;

2
src/soc/intel/tigerlake/romstage/fsp_params.c
View File

@ -71,7 +71,7 @@ static void soc_memory_init_params(FSP_M_CONFIG *m_cfg,
/* Set debug interface flags */ /* Set debug interface flags */
m_cfg->PcdDebugInterfaceFlags = CONFIG(DRIVERS_UART_8250IO) ? m_cfg->PcdDebugInterfaceFlags = CONFIG(DRIVERS_UART_8250IO) ?
DEBUG_INTERFACE_UART : DEBUG_INTERFACE_SERIAL_IO; DEBUG_INTERFACE_UART_8250IO : DEBUG_INTERFACE_LPSS_SERIAL_IO;
/* TraceHub configuration */ /* TraceHub configuration */
dev = pcidev_path_on_root(PCH_DEVFN_TRACEHUB); dev = pcidev_path_on_root(PCH_DEVFN_TRACEHUB);