From 7bfd1105bedd11a81749411a271a15ae511c87ad Mon Sep 17 00:00:00 2001
From: Subrata Banik <subratabanik@google.com>
Date: Sat, 4 Feb 2023 02:38:55 +0530
Subject: [PATCH] Revert "UPSTREAM: mb/google/rex: Enable SaGv"

Enabling `SaGv` along with FSP v2473 is causing blank display issue.
Mostly likely we shouldn't enable SaGv yet on Intel MeteorLake.

BUG=b:267446159
TEST=Able to see ChromeOS UI in consecutive boot.

This reverts commit cbca81c5946384843197c08401c4266f45fef4a2.

Signed-off-by: Subrata Banik <subratabanik@google.com>
Change-Id: Ifbcc36515f7550c183c40e5af94684f5c3e39a7a
Reviewed-on: https://review.coreboot.org/c/coreboot/+/72774
Reviewed-by: Tarun Tuli <taruntuli@google.com>
Reviewed-by: Jamie Ryu <jamie.m.ryu@intel.com>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
---
 src/mainboard/google/rex/variants/baseboard/rex/devicetree.cb | 2 --
 1 file changed, 2 deletions(-)

diff --git a/src/mainboard/google/rex/variants/baseboard/rex/devicetree.cb b/src/mainboard/google/rex/variants/baseboard/rex/devicetree.cb
index f14699ff4e..a3225ca111 100644
--- a/src/mainboard/google/rex/variants/baseboard/rex/devicetree.cb
+++ b/src/mainboard/google/rex/variants/baseboard/rex/devicetree.cb
@@ -20,8 +20,6 @@ chip soc/intel/meteorlake
 	# Enable CNVi BT
 	register "cnvi_bt_core" = "true"
 
-	register "sagv" = "SAGV_ENABLED"
-
 	register "serial_io_uart_mode" = "{
 		[PchSerialIoIndexUART0] = PchSerialIoPci,
 		[PchSerialIoIndexUART1] = PchSerialIoDisabled,