diff --git a/src/soc/intel/cannonlake/romstage/romstage.c b/src/soc/intel/cannonlake/romstage/romstage.c
index a83cf616e8..236a122cb4 100644
--- a/src/soc/intel/cannonlake/romstage/romstage.c
+++ b/src/soc/intel/cannonlake/romstage/romstage.c
@@ -130,6 +130,16 @@ void mainboard_romstage_entry(void)
 	s3wake = pmc_fill_power_state(ps) == ACPI_S3;
 	fsp_memory_init(s3wake);
 	pmc_set_disb();
-	if (!s3wake)
+	if (!s3wake) {
+		/*
+		 * cse_fw_sync() must be called after DRAM initialization as
+		 * HMRFPO_ENABLE HECI command (which is used by cse_fw_sync())
+		 * is expected to be executed after DRAM initialization.
+		 */
+
+		if (CONFIG(SOC_INTEL_CSE_LITE_SKU))
+			cse_fw_sync();
+
 		save_dimm_info();
+	}
 }