diff --git a/src/mainboard/google/rex/Kconfig b/src/mainboard/google/rex/Kconfig index d848ac71f2..dbccce6770 100644 --- a/src/mainboard/google/rex/Kconfig +++ b/src/mainboard/google/rex/Kconfig @@ -7,6 +7,8 @@ config BOARD_GOOGLE_REX_COMMON config BOARD_GOOGLE_BASEBOARD_REX def_bool n select BOARD_GOOGLE_REX_COMMON + select EC_GOOGLE_CHROMEEC + select EC_GOOGLE_CHROMEEC_ESPI select SOC_INTEL_METEORLAKE select SYSTEM_TYPE_LAPTOP @@ -19,6 +21,10 @@ config BASEBOARD_DIR string default "rex" if BOARD_GOOGLE_BASEBOARD_REX +config CHROMEOS + select GBB_FLAG_DISABLE_EC_SOFTWARE_SYNC + select VBOOT_LID_SWITCH + config DEVICETREE default "variants/baseboard/\$(CONFIG_BASEBOARD_DIR)/devicetree.cb" diff --git a/src/mainboard/google/rex/Makefile.inc b/src/mainboard/google/rex/Makefile.inc index f839c328fd..cab45dfa2a 100644 --- a/src/mainboard/google/rex/Makefile.inc +++ b/src/mainboard/google/rex/Makefile.inc @@ -3,6 +3,7 @@ bootblock-y += bootblock.c romstage-y += romstage.c ramstage-y += mainboard.c +ramstage-y += ec.c VARIANT_DIR:=$(call strip_quotes,$(CONFIG_VARIANT_DIR)) BASEBOARD_DIR:=$(call strip_quotes,$(CONFIG_BASEBOARD_DIR)) diff --git a/src/mainboard/google/rex/dsdt.asl b/src/mainboard/google/rex/dsdt.asl index cecfe521fa..c967f5a3ff 100644 --- a/src/mainboard/google/rex/dsdt.asl +++ b/src/mainboard/google/rex/dsdt.asl @@ -1,6 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-or-later */ #include +#include DefinitionBlock( "dsdt.aml", @@ -31,4 +32,13 @@ DefinitionBlock( /* Chipset specific sleep states */ #include + + /* Chrome OS Embedded Controller */ + Scope (\_SB.PCI0.LPCB) + { + /* ACPI code for EC SuperIO functions */ + #include + /* ACPI code for EC functions */ + #include + } } diff --git a/src/mainboard/google/rex/ec.c b/src/mainboard/google/rex/ec.c new file mode 100644 index 0000000000..f828bc5547 --- /dev/null +++ b/src/mainboard/google/rex/ec.c @@ -0,0 +1,22 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#include +#include +#include +#include +#include + +void mainboard_ec_init(void) +{ + static const struct google_chromeec_event_info info = { + .log_events = MAINBOARD_EC_LOG_EVENTS, + .sci_events = MAINBOARD_EC_SCI_EVENTS, + .s3_wake_events = MAINBOARD_EC_S3_WAKE_EVENTS, + .s5_wake_events = MAINBOARD_EC_S5_WAKE_EVENTS, + .s0ix_wake_events = MAINBOARD_EC_S0IX_WAKE_EVENTS, + }; + + printk(BIOS_DEBUG, "mainboard: EC init\n"); + + google_chromeec_events_init(&info, acpi_is_wakeup_s3()); +} diff --git a/src/mainboard/google/rex/mainboard.c b/src/mainboard/google/rex/mainboard.c index d7c31565b9..f3fef836dc 100644 --- a/src/mainboard/google/rex/mainboard.c +++ b/src/mainboard/google/rex/mainboard.c @@ -2,6 +2,7 @@ #include #include +#include static void mainboard_init(void *chip_info) { @@ -10,10 +11,14 @@ static void mainboard_init(void *chip_info) pads = variant_gpio_table(&num); gpio_configure_pads(pads, num); } +static void mainboard_dev_init(struct device *dev) +{ + mainboard_ec_init(); +} static void mainboard_enable(struct device *dev) { - /* TODO: Enable mainboard */ + dev->ops->init = mainboard_dev_init; } struct chip_operations mainboard_ops = { diff --git a/src/mainboard/google/rex/variants/baseboard/rex/include/baseboard/ec.h b/src/mainboard/google/rex/variants/baseboard/rex/include/baseboard/ec.h new file mode 100644 index 0000000000..3c7fde5f54 --- /dev/null +++ b/src/mainboard/google/rex/variants/baseboard/rex/include/baseboard/ec.h @@ -0,0 +1,76 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#ifndef __BASEBOARD_EC_H__ +#define __BASEBOARD_EC_H__ + +#include +#include +#include + +#define MAINBOARD_EC_SCI_EVENTS \ + (EC_HOST_EVENT_MASK(EC_HOST_EVENT_LID_CLOSED) |\ + EC_HOST_EVENT_MASK(EC_HOST_EVENT_LID_OPEN) |\ + EC_HOST_EVENT_MASK(EC_HOST_EVENT_AC_CONNECTED) |\ + EC_HOST_EVENT_MASK(EC_HOST_EVENT_AC_DISCONNECTED) |\ + EC_HOST_EVENT_MASK(EC_HOST_EVENT_BATTERY_LOW) |\ + EC_HOST_EVENT_MASK(EC_HOST_EVENT_BATTERY_CRITICAL) |\ + EC_HOST_EVENT_MASK(EC_HOST_EVENT_BATTERY) |\ + EC_HOST_EVENT_MASK(EC_HOST_EVENT_BATTERY_STATUS) |\ + EC_HOST_EVENT_MASK(EC_HOST_EVENT_THERMAL_THRESHOLD) |\ + EC_HOST_EVENT_MASK(EC_HOST_EVENT_THROTTLE_START) |\ + EC_HOST_EVENT_MASK(EC_HOST_EVENT_THROTTLE_STOP) |\ + EC_HOST_EVENT_MASK(EC_HOST_EVENT_USB_CHARGER) |\ + EC_HOST_EVENT_MASK(EC_HOST_EVENT_MKBP) |\ + EC_HOST_EVENT_MASK(EC_HOST_EVENT_PD_MCU) |\ + EC_HOST_EVENT_MASK(EC_HOST_EVENT_MODE_CHANGE) |\ + EC_HOST_EVENT_MASK(EC_HOST_EVENT_USB_MUX)) +#define MAINBOARD_EC_SMI_EVENTS \ + (EC_HOST_EVENT_MASK(EC_HOST_EVENT_LID_CLOSED)) +/* EC can wake from S5 with lid or power button */ +#define MAINBOARD_EC_S5_WAKE_EVENTS \ + (EC_HOST_EVENT_MASK(EC_HOST_EVENT_LID_OPEN) |\ + EC_HOST_EVENT_MASK(EC_HOST_EVENT_POWER_BUTTON)) +/* + * EC can wake from S3/S0ix with: + * 1. Lid open + * 2. AC Connect/Disconnect + * 3. Power button + * 4. Key press + * 5. Mode change + */ +#define MAINBOARD_EC_S3_WAKE_EVENTS \ + (MAINBOARD_EC_S5_WAKE_EVENTS |\ + EC_HOST_EVENT_MASK(EC_HOST_EVENT_AC_CONNECTED) |\ + EC_HOST_EVENT_MASK(EC_HOST_EVENT_AC_DISCONNECTED) |\ + EC_HOST_EVENT_MASK(EC_HOST_EVENT_KEY_PRESSED) |\ + EC_HOST_EVENT_MASK(EC_HOST_EVENT_MODE_CHANGE)) +#define MAINBOARD_EC_S0IX_WAKE_EVENTS \ + (MAINBOARD_EC_S3_WAKE_EVENTS |\ + EC_HOST_EVENT_MASK(EC_HOST_EVENT_USB_MUX) |\ + EC_HOST_EVENT_MASK(EC_HOST_EVENT_HANG_DETECT)) +/* Log EC wake events plus EC shutdown events */ +#define MAINBOARD_EC_LOG_EVENTS \ + (EC_HOST_EVENT_MASK(EC_HOST_EVENT_THERMAL_SHUTDOWN) |\ + EC_HOST_EVENT_MASK(EC_HOST_EVENT_BATTERY_SHUTDOWN) |\ + EC_HOST_EVENT_MASK(EC_HOST_EVENT_PANIC)) +/* + * ACPI related definitions for ASL code. + */ +/* Enable EC backed ALS device in ACPI */ +#define EC_ENABLE_ALS_DEVICE +/* Enable Keyboard Backlight */ +#define EC_ENABLE_KEYBOARD_BACKLIGHT +/* Enable MKBP for buttons and switches */ +#define EC_ENABLE_MKBP_DEVICE +/* Enable LID switch and provide wake pin for EC */ +#define EC_ENABLE_LID_SWITCH +#define EC_ENABLE_WAKE_PIN GPE_EC_WAKE +/* Enable EC backed PD MCU device in ACPI */ +#define EC_ENABLE_PD_MCU_DEVICE +#define SIO_EC_MEMMAP_ENABLE /* EC Memory Map Resources */ +#define SIO_EC_HOST_ENABLE /* EC Host Interface Resources */ +#define SIO_EC_ENABLE_PS2K /* Enable PS/2 Keyboard */ + +#define EC_ENABLE_SYNC_IRQ /* Enable tight timestamp / wake support */ + +#endif /* __BASEBOARD_EC_H__ */ diff --git a/src/mainboard/google/rex/variants/baseboard/rex/include/baseboard/gpio.h b/src/mainboard/google/rex/variants/baseboard/rex/include/baseboard/gpio.h index a708db11ad..0011ebb6ed 100644 --- a/src/mainboard/google/rex/variants/baseboard/rex/include/baseboard/gpio.h +++ b/src/mainboard/google/rex/variants/baseboard/rex/include/baseboard/gpio.h @@ -6,4 +6,11 @@ #include #include +/* GPIO IRQ for tight timestamps / wake support */ +#define EC_SYNC_IRQ 0 +/* eSPI virtual wire reporting */ +#define EC_SCI_GPI GPE0_ESPI +/* EC wake is LAN_WAKE# which is a special DeepSX wake pin */ +#define GPE_EC_WAKE GPE0_LAN_WAK + #endif /* __BASEBOARD_GPIO_H__ */ diff --git a/src/mainboard/google/rex/variants/rex0/include/variant/ec.h b/src/mainboard/google/rex/variants/rex0/include/variant/ec.h new file mode 100644 index 0000000000..4fc0622f15 --- /dev/null +++ b/src/mainboard/google/rex/variants/rex0/include/variant/ec.h @@ -0,0 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#ifndef MAINBOARD_EC_H +#define MAINBOARD_EC_H + +#include + +#endif /* MAINBOARD_GPIO_H */ diff --git a/src/mainboard/google/rex/variants/rex0/include/variant/gpio.h b/src/mainboard/google/rex/variants/rex0/include/variant/gpio.h index 27c87b3fe7..41c3798bc1 100644 --- a/src/mainboard/google/rex/variants/rex0/include/variant/gpio.h +++ b/src/mainboard/google/rex/variants/rex0/include/variant/gpio.h @@ -5,4 +5,6 @@ #include +/* TODO: Add GPIO as per rex board */ + #endif /* __MAINBOARD_GPIO_H__ */