mediatek/mt8173: Add mt6311 driver
Add secondary PMIC for external buck control on Oak rev3/4 BRANCH=none BUG=none TEST=verified on Oak rev4/rev5 Change-Id: I24c18a1cf71fc57deacedcbeb6a100b131c28077 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 7f7f8ceac795d8193194a6918a73c4b391009025 Original-Change-Id: I312d8281d2c09d8bc43f092edef3e405d51ee7d0 Original-Signed-off-by: henryc.chen <henryc.chen@mediatek.com> Original-Reviewed-on: https://chromium-review.googlesource.com/332341 Original-Commit-Ready: Yidi Lin <yidi.lin@mediatek.com> Original-Tested-by: Yidi Lin <yidi.lin@mediatek.com> Original-Reviewed-by: Julius Werner <jwerner@chromium.org> Reviewed-on: https://review.coreboot.org/14121 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
This commit is contained in:
henryc.chen
Martin Roth
parent
d33ebd1374
commit
7c54d2a760
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@ -66,6 +66,7 @@ ramstage-y += soc.c mtcmos.c
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ramstage-y += timer.c
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ramstage-$(CONFIG_DRIVERS_UART) += uart.c
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ramstage-y += pmic_wrap.c mt6391.c i2c.c
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ramstage-y += mt6311.c
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ramstage-y += gpio.c
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ramstage-y += wdt.c
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ramstage-y += pll.c
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@ -0,0 +1,52 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright 2015 MediaTek Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef __SOC_MEDIATEK_MT8173_MT6311_H__
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#define __SOC_MEDIATEK_MT8173_MT6311_H__
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void mt6311_probe(uint8_t i2c_num);
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enum {
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MT6311_CID = 0x0,
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MT6311_SWCID = 0x1,
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MT6311_GPIO_MODE = 0x04,
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MT6311_TOP_CON = 0x0A,
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MT6311_TOP_RST_CON = 0x15,
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MT6311_TOP_INT_CON = 0x18,
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MT6311_STRUP_CON5 = 0x1F,
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MT6311_EFUSE_DOUT_56_63 = 0x40,
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MT6311_EFUSE_DOUT_64_71 = 0x41,
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MT6311_BUCK_ALL_CON23 = 0x69,
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MT6311_STRUP_ANA_CON1 = 0x6D,
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MT6311_STRUP_ANA_CON2 = 0x6E,
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MT6311_VDVFS1_ANA_CON10 = 0x84,
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MT6311_VDVFS11_CON7 = 0x88,
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MT6311_VDVFS11_CON9 = 0x8A,
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MT6311_VDVFS11_CON10 = 0x8B,
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MT6311_VDVFS11_CON11 = 0x8C,
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MT6311_VDVFS11_CON12 = 0x8D,
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MT6311_VDVFS11_CON13 = 0x8E,
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MT6311_VDVFS11_CON14 = 0x8F,
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MT6311_VDVFS11_CON19 = 0x94,
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MT6311_LDO_CON3 = 0xCF,
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};
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enum {
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MT6311_E1_CID_CODE = 0x0110,
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MT6311_E2_CID_CODE = 0x0120,
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MT6311_E3_CID_CODE = 0x0130,
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};
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#endif
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@ -0,0 +1,131 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright 2015 MediaTek Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <console/console.h>
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#include <device/i2c.h>
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#include <soc/mt6311.h>
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enum {
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MT6311_SLAVE_ADDR = 0x6B,
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};
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static u32 get_mt6311_chip_id(uint8_t i2c_num)
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{
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unsigned char id[2] = {0};
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i2c_read_field(i2c_num, MT6311_SLAVE_ADDR, MT6311_CID,
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&id[0], 0xFF, 0);
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i2c_read_field(i2c_num, MT6311_SLAVE_ADDR, MT6311_SWCID,
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&id[1], 0xFF, 0);
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return (u32)(id[0] << 8 | id[1]);
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}
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static void mt6311_hw_init(uint8_t i2c_num)
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{
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int ret = 0;
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unsigned char var[3] = {0};
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/*
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* Phase Shedding Trim Software Setting
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* The phase 2 of MT6311 will enter PWM mode if the threshold is
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* reached.
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* The threshold is set according to EFUSE value.
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*/
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ret |= i2c_read_field(i2c_num, MT6311_SLAVE_ADDR,
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MT6311_EFUSE_DOUT_56_63, &var[0],
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0x3, 1);
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ret |= i2c_read_field(i2c_num, MT6311_SLAVE_ADDR,
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MT6311_EFUSE_DOUT_56_63, &var[1],
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0x1, 7);
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ret |= i2c_read_field(i2c_num, MT6311_SLAVE_ADDR,
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MT6311_EFUSE_DOUT_64_71, &var[2],
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0x1, 0);
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ret |= i2c_write_field(i2c_num, MT6311_SLAVE_ADDR,
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MT6311_VDVFS1_ANA_CON10,
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var[0] | var[1] << 2 | var[2] << 3, 0xf, 0);
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/* I2C_CONFIG; pushpull setting, Opendrain is '0' */
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ret |= i2c_write_field(i2c_num, MT6311_SLAVE_ADDR, MT6311_TOP_INT_CON,
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0x1, 0x1, 2);
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/* RG_WDTRSTB_EN; CC, initial WDRSTB setting. */
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ret |= i2c_write_field(i2c_num, MT6311_SLAVE_ADDR, MT6311_TOP_RST_CON,
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0x1, 0x1, 5);
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/* initial INT function */
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ret |= i2c_write_field(i2c_num, MT6311_SLAVE_ADDR, MT6311_GPIO_MODE,
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0x1, 0x7, 3);
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ret |= i2c_write_field(i2c_num, MT6311_SLAVE_ADDR, MT6311_STRUP_CON5,
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0, 1 << 2 | 1 << 1 | 1 << 0, 0);
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/* Vo max is 1.15V */
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ret |= i2c_write_field(i2c_num, MT6311_SLAVE_ADDR,
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MT6311_STRUP_ANA_CON1, 0x3, 0x3, 5);
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ret |= i2c_write_field(i2c_num, MT6311_SLAVE_ADDR,
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MT6311_BUCK_ALL_CON23, 0x1, 0x1, 0);
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ret |= i2c_write_field(i2c_num, MT6311_SLAVE_ADDR,
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MT6311_STRUP_ANA_CON2, 0x3, 0x3, 0);
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/* Suspend HW control from SPM */
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ret |= i2c_write_field(i2c_num, MT6311_SLAVE_ADDR,
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MT6311_TOP_CON, 0x1, 0x1, 0);
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ret |= i2c_write_field(i2c_num, MT6311_SLAVE_ADDR,
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MT6311_VDVFS11_CON7, 0x1, 0x1, 0);
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/* default VDVFS power on */
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ret |= i2c_write_field(i2c_num, MT6311_SLAVE_ADDR,
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MT6311_VDVFS11_CON9, 0x1, 0x1, 0);
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/* for DVFS slew rate rising=0.67us */
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ret |= i2c_write_field(i2c_num, MT6311_SLAVE_ADDR,
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MT6311_VDVFS11_CON10, 0x1, 0x7f, 0);
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/* for DVFS slew rate, falling 2.0us */
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ret |= i2c_write_field(i2c_num, MT6311_SLAVE_ADDR,
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MT6311_VDVFS11_CON11, 0x5, 0x7f, 0);
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/* default VDVFS11_VOSEL 1.0V, SW control */
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ret |= i2c_write_field(i2c_num, MT6311_SLAVE_ADDR,
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MT6311_VDVFS11_CON12, 0x40, 0x7f, 0);
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/* default VDVFS11_VOSEL_ON 1.0V, HW control */
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ret |= i2c_write_field(i2c_num, MT6311_SLAVE_ADDR,
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MT6311_VDVFS11_CON13, 0x40, 0x7f, 0);
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ret |= i2c_write_field(i2c_num, MT6311_SLAVE_ADDR,
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MT6311_VDVFS11_CON14, 0x40, 0x7f, 0);
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/* for DVFS sof change, falling 50us */
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ret |= i2c_write_field(i2c_num, MT6311_SLAVE_ADDR,
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MT6311_VDVFS11_CON19, 0x3, 0x3, 0);
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/* for DVFS sof change, falling only */
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ret |= i2c_write_field(i2c_num, MT6311_SLAVE_ADDR,
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MT6311_VDVFS11_CON19, 0x1, 0x3, 4);
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/* OFF LDO */
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ret |= i2c_write_field(i2c_num, MT6311_SLAVE_ADDR,
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MT6311_LDO_CON3, 0, 0x1, 0);
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if (ret)
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printk(BIOS_ERR, "ERROR: %s failed\n", __func__);
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}
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void mt6311_probe(uint8_t i2c_num)
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{
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u32 val = 0;
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/* Check device ID is MT6311 */
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val = get_mt6311_chip_id(i2c_num);
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printk(BIOS_INFO, "%s: device ID = %#x\n", __func__, val);
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if (val < MT6311_E1_CID_CODE) {
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printk(BIOS_ERR, "ERROR: unknown MT6311 device_id\n");
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return;
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}
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mt6311_hw_init(i2c_num);
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}
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