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nb/haswell: set ASLB gnvs to OpRegion ACPI memory address 

The ALSB gnvs variable is used to load the OpRegion memory
address into the ASLS register on the S3 resume path, and must
therefore first be set on the normal boot path.
This patch brings Haswell in line with SNB/IVB/Nehalem, which
already save the OpRegion address in ASLB.

Change-Id: Ie062cbfe7e7f60c2a4e2b9111f6b6da87ced7a39
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/20254
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
This commit is contained in:
Matt DeVillier 2017-06-16 23:36:46 -05:00 committed by Martin Roth
parent 12983db91d
commit 7c78970214
1 changed files with 12 additions and 0 deletions
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12
src/northbridge/intel/haswell/gma.c
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@ -14,6 +14,7 @@
*/
#include <arch/io.h>
#include <cbmem.h>
#include <console/console.h>
#include <bootmode.h>
#include <delay.h>
@ -24,6 +25,7 @@
#include <drivers/intel/gma/i915.h>
#include <cpu/intel/haswell/haswell.h>
#include <northbridge/intel/common/gma_opregion.h>
#include <southbridge/intel/lynxpoint/nvs.h>
#include <stdlib.h>
#include <string.h>
@ -514,12 +516,22 @@ gma_write_acpi_tables(struct device *const dev,
struct acpi_rsdp *const rsdp)
{
igd_opregion_t *opregion = (igd_opregion_t *)current;
global_nvs_t *gnvs;
if (init_igd_opregion(opregion) != CB_SUCCESS)
return current;
current += sizeof(igd_opregion_t);
/* GNVS has been already set up */
gnvs = cbmem_find(CBMEM_ID_ACPI_GNVS);
if (gnvs) {
/* IGD OpRegion Base Address */
gnvs->aslb = (u32)(uintptr_t)opregion;
} else {
printk(BIOS_ERR, "Error: GNVS table not found.\n");
}
gma_enable_swsci();
current = acpi_align_current(current);