mb/lowrisc/nexys4ddr: Actually fix the UART clock setup

Ron's code calculated the DLL and DLM registers of the 8250 UART, but
that's the job of the UART driver. uart_input_clock_divider isn't needed
anymore because the default value of 16 works.

As a bonus, the baud rate can now be selected in Kconfig, instead of
being hardcoded at 115200.

TEST=Booted the board at 9600 and 115200 baud.

Change-Id: I3d5e49568b798a6a6d944db1161def7d0a2d3b48
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-on: https://review.coreboot.org/17188
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
This commit is contained in:
Jonathan Neuschäfer 2016-10-29 21:48:18 +02:00 committed by Ronald G. Minnich
parent 7d9068fe0b
commit 7ca9b8ae50
2 changed files with 2 additions and 12 deletions

View File

@ -21,7 +21,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select DRIVERS_UART_8250MEM
select BOOT_DEVICE_NOT_SPI_FLASH
select UART_OVERRIDE_REFCLK
select UART_OVERRIDE_INPUT_CLOCK_DIVIDER
config MAINBOARD_DIR
string

View File

@ -24,17 +24,8 @@ uintptr_t uart_platform_base(int idx)
return (uintptr_t) 0x42000000;
}
/* these are currently not quite right but they are here for reference
* and will be fixed when lowrisc gives us a standard clock
* and set of values. */
// divisor = clk_freq / (16 * Baud)
unsigned int uart_input_clock_divider(void)
{
return (25 * 1000 * 1000u / (16u * 115200u)) % 0x100;
}
// System clock 25 MHz, 115200 baud rate
/* The clock which the UART is based on */
unsigned int uart_platform_refclk(void)
{
return (25 * 1000 * 1000u / (16u * 115200u)) >> 8;
return 25 * MHz;
}