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soc/intel/alderlake: Use coreboot native event handler for FSP-M/S 

This patch assigns FSP handler event for FSP-M and FSP-S with coreboot
romstage and ramstage debug handler when FSP_USES_CB_DEBUG_EVENT_HANDLER
Kconfig is enabled.

BUG=b:225544587
TEST=Able to build and boot brya. Also, verified the FSP debug log is
exactly same before and with this code change.

Signed-off-by: Subrata Banik <subratabanik@google.com>
Change-Id: I665def977faaae45f6f834d75e8456859093ba49
Reviewed-on: https://review.coreboot.org/c/coreboot/+/63008
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
This commit is contained in:
Subrata Banik 2022-03-23 01:33:27 +05:30 committed by Arthur Heymans
parent 3ecc77722c
commit 7cb6d72116
2 changed files with 9 additions and 0 deletions
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3
src/soc/intel/alderlake/fsp_params.c
View File

@ -7,6 +7,7 @@
#include <device/pci.h> #include <device/pci.h>
#include <device/pci_ids.h> #include <device/pci_ids.h>
#include <fsp/api.h> #include <fsp/api.h>
#include <fsp/fsp_debug_event.h>
#include <fsp/ppi/mp_service_ppi.h> #include <fsp/ppi/mp_service_ppi.h>
#include <fsp/util.h> #include <fsp/util.h>
#include <option.h> #include <option.h>
@ -509,6 +510,8 @@ static void fill_fsps_xdci_params(FSP_S_CONFIG *s_cfg,
static void fill_fsps_uart_params(FSP_S_CONFIG *s_cfg, static void fill_fsps_uart_params(FSP_S_CONFIG *s_cfg,
const struct soc_intel_alderlake_config *config) const struct soc_intel_alderlake_config *config)
{ {
if (CONFIG(FSP_USES_CB_DEBUG_EVENT_HANDLER))
s_cfg->FspEventHandler = (UINT32)((FSP_EVENT_HANDLER *)fsp_debug_event_handler);
/* PCH UART selection for FSP Debug */ /* PCH UART selection for FSP Debug */
s_cfg->SerialIoDebugUartNumber = CONFIG_UART_FOR_CONSOLE; s_cfg->SerialIoDebugUartNumber = CONFIG_UART_FOR_CONSOLE;
ASSERT(ARRAY_SIZE(s_cfg->SerialIoUartAutoFlow) > CONFIG_UART_FOR_CONSOLE); ASSERT(ARRAY_SIZE(s_cfg->SerialIoUartAutoFlow) > CONFIG_UART_FOR_CONSOLE);

6
src/soc/intel/alderlake/romstage/fsp_params.c
View File

@ -6,6 +6,7 @@
#include <cpu/intel/cpu_ids.h> #include <cpu/intel/cpu_ids.h>
#include <device/device.h> #include <device/device.h>
#include <drivers/wifi/generic/wifi.h> #include <drivers/wifi/generic/wifi.h>
#include <fsp/fsp_debug_event.h>
#include <fsp/util.h> #include <fsp/util.h>
#include <intelblocks/cpulib.h> #include <intelblocks/cpulib.h>
#include <intelblocks/pcie_rp.h> #include <intelblocks/pcie_rp.h>
@ -364,6 +365,11 @@ void platform_fsp_memory_init_params_cb(FSPM_UPD *mupd, uint32_t version)
{ {
const struct soc_intel_alderlake_config *config; const struct soc_intel_alderlake_config *config;
FSP_M_CONFIG *m_cfg = &mupd->FspmConfig; FSP_M_CONFIG *m_cfg = &mupd->FspmConfig;
FSPM_ARCH_UPD *arch_upd = &mupd->FspmArchUpd;
if (CONFIG(FSP_USES_CB_DEBUG_EVENT_HANDLER))
arch_upd->FspEventHandler = (UINT32)((FSP_EVENT_HANDLER *)
fsp_debug_event_handler);
config = config_of_soc(); config = config_of_soc();