From 7cbeaff5dee24b8c03ffc17a453830d8ae4c0a75 Mon Sep 17 00:00:00 2001 From: Kevin Chiu Date: Wed, 6 Oct 2021 19:02:56 +0800 Subject: [PATCH] mb/google/guybrush/var/nipperkin: Enable RTD3 support for eMMC as NVMe nipperkin has different H/W topology to guybrush that the eMMC device is on a different GPP: guybrush: GPP3 nipperkin: GPP2 Hence we need to enable RTD3 for nipperkin additionally which refers to this one: https://review.coreboot.org/c/coreboot/+/54967 BUG=b:200246826 BRANCH=guybrush TEST=emerge-guybrush coreboot chromeos-bootimage run suspend test on eMMC sku Signed-off-by: Kevin Chiu Change-Id: I1dca8f9e4739514d2d024374d8686f27b25582a9 Reviewed-on: https://review.coreboot.org/c/coreboot/+/58135 Tested-by: build bot (Jenkins) Reviewed-by: Raul Rangel --- .../google/guybrush/variants/nipperkin/overridetree.cb | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/src/mainboard/google/guybrush/variants/nipperkin/overridetree.cb b/src/mainboard/google/guybrush/variants/nipperkin/overridetree.cb index ecaf0cd2df..a53a6e5795 100644 --- a/src/mainboard/google/guybrush/variants/nipperkin/overridetree.cb +++ b/src/mainboard/google/guybrush/variants/nipperkin/overridetree.cb @@ -32,6 +32,13 @@ end chip soc/amd/cezanne device domain 0 on + device ref gpp_bridge_2 on + # Required so the NVMe gets placed into D3 when entering S0i3. + chip drivers/pcie/rtd3/device + register "name" = ""NVME"" + device pci 00.0 on end + end + end # NVMe device ref gpp_bridge_a on # Internal GPP Bridge 0 to Bus A device ref acp on chip drivers/amd/i2s_machine_dev