soc/amd/picasso: move to using smbus_host.h definitions

The SMBus function declarations were duplicated. Use the common
ones provided by smbus_host.h.

Change-Id: Ia8fec8f58d72690d73f2241e69b3ff05f74943a4
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38615
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Aaron Durbin 2020-01-28 11:12:34 -07:00
parent c3488988b8
commit 7cd39d2770
4 changed files with 12 additions and 40 deletions

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@ -1,27 +0,0 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2010 Advanced Micro Devices, Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#ifndef __PICASSO_SMBUS_H__
#define __PICASSO_SMBUS_H__
#include <stdint.h>
#include <soc/iomap.h>
int do_smbus_read_byte(u32 mmio, u8 device, u8 address);
int do_smbus_write_byte(u32 mmio, u8 device, u8 address, u8 val);
int do_smbus_recv_byte(u32 mmio, u8 device);
int do_smbus_send_byte(u32 mmio, u8 device, u8 val);
#endif /* __PICASSO_SMBUS_H__ */

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@ -18,10 +18,10 @@
#include <device/pci_ids.h> #include <device/pci_ids.h>
#include <device/pci_ops.h> #include <device/pci_ops.h>
#include <device/smbus.h> #include <device/smbus.h>
#include <device/smbus_host.h>
#include <cpu/x86/lapic.h> #include <cpu/x86/lapic.h>
#include <arch/ioapic.h> #include <arch/ioapic.h>
#include <soc/southbridge.h> #include <soc/southbridge.h>
#include <soc/smbus.h>
/* /*
* The southbridge enables all USB controllers by default in SMBUS Control. * The southbridge enables all USB controllers by default in SMBUS Control.

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@ -15,8 +15,8 @@
#include <stdint.h> #include <stdint.h>
#include <console/console.h> #include <console/console.h>
#include <device/smbus_host.h>
#include <amdblocks/acpimmio.h> #include <amdblocks/acpimmio.h>
#include <soc/smbus.h>
#include <soc/southbridge.h> #include <soc/southbridge.h>
/* /*
@ -25,7 +25,7 @@
*/ */
#define SMBUS_TIMEOUT (100 * 1000 * 10) #define SMBUS_TIMEOUT (100 * 1000 * 10)
static u8 controller_read8(u32 base, u8 reg) static u8 controller_read8(uintptr_t base, u8 reg)
{ {
switch (base) { switch (base) {
case ACPIMMIO_SMBUS_BASE: case ACPIMMIO_SMBUS_BASE:
@ -33,13 +33,13 @@ static u8 controller_read8(u32 base, u8 reg)
case ACPIMMIO_ASF_BASE: case ACPIMMIO_ASF_BASE:
return asf_read8(reg); return asf_read8(reg);
default: default:
printk(BIOS_ERR, "Error attempting to read SMBus at address 0x%x\n", printk(BIOS_ERR, "Error attempting to read SMBus at address 0x%lx\n",
base); base);
} }
return 0xff; return 0xff;
} }
static void controller_write8(u32 base, u8 reg, u8 val) static void controller_write8(uintptr_t base, u8 reg, u8 val)
{ {
switch (base) { switch (base) {
case ACPIMMIO_SMBUS_BASE: case ACPIMMIO_SMBUS_BASE:
@ -49,12 +49,12 @@ static void controller_write8(u32 base, u8 reg, u8 val)
asf_write8(reg, val); asf_write8(reg, val);
break; break;
default: default:
printk(BIOS_ERR, "Error attempting to write SMBus at address 0x%x\n", printk(BIOS_ERR, "Error attempting to write SMBus at address 0x%lx\n",
base); base);
} }
} }
static int smbus_wait_until_ready(u32 mmio) static int smbus_wait_until_ready(uintptr_t mmio)
{ {
u32 loops; u32 loops;
loops = SMBUS_TIMEOUT; loops = SMBUS_TIMEOUT;
@ -70,7 +70,7 @@ static int smbus_wait_until_ready(u32 mmio)
return -2; /* time out */ return -2; /* time out */
} }
static int smbus_wait_until_done(u32 mmio) static int smbus_wait_until_done(uintptr_t mmio)
{ {
u32 loops; u32 loops;
loops = SMBUS_TIMEOUT; loops = SMBUS_TIMEOUT;
@ -89,7 +89,7 @@ static int smbus_wait_until_done(u32 mmio)
return -3; /* timeout */ return -3; /* timeout */
} }
int do_smbus_recv_byte(u32 mmio, u8 device) int do_smbus_recv_byte(uintptr_t mmio, u8 device)
{ {
u8 byte; u8 byte;
@ -114,7 +114,7 @@ int do_smbus_recv_byte(u32 mmio, u8 device)
return byte; return byte;
} }
int do_smbus_send_byte(u32 mmio, u8 device, u8 val) int do_smbus_send_byte(uintptr_t mmio, u8 device, u8 val)
{ {
u8 byte; u8 byte;
@ -139,7 +139,7 @@ int do_smbus_send_byte(u32 mmio, u8 device, u8 val)
return 0; return 0;
} }
int do_smbus_read_byte(u32 mmio, u8 device, u8 address) int do_smbus_read_byte(uintptr_t mmio, u8 device, u8 address)
{ {
u8 byte; u8 byte;
@ -167,7 +167,7 @@ int do_smbus_read_byte(u32 mmio, u8 device, u8 address)
return byte; return byte;
} }
int do_smbus_write_byte(u32 mmio, u8 device, u8 address, u8 val) int do_smbus_write_byte(uintptr_t mmio, u8 device, u8 address, u8 val)
{ {
u8 byte; u8 byte;

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@ -29,7 +29,6 @@
#include <amdblocks/acpi.h> #include <amdblocks/acpi.h>
#include <soc/cpu.h> #include <soc/cpu.h>
#include <soc/southbridge.h> #include <soc/southbridge.h>
#include <soc/smbus.h>
#include <soc/smi.h> #include <soc/smi.h>
#include <soc/amd_pci_int_defs.h> #include <soc/amd_pci_int_defs.h>
#include <delay.h> #include <delay.h>