diff --git a/src/soc/intel/cannonlake/fsp_params.c b/src/soc/intel/cannonlake/fsp_params.c
index 9befdc8fda..6167346f89 100644
--- a/src/soc/intel/cannonlake/fsp_params.c
+++ b/src/soc/intel/cannonlake/fsp_params.c
@@ -128,6 +128,9 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd)
 	/* S0ix */
 	params->PchPmSlpS0Enable = config->s0ix_enable;
 
+	/* disable Legacy PME */
+	memset(params->PcieRpPmSci, 0, sizeof(params->PcieRpPmSci));
+
 	/* USB */
 	for (i = 0; i < ARRAY_SIZE(config->usb2_ports); i++) {
 		params->PortUsb20Enable[i] = config->usb2_ports[i].enable;