soc/amd/*: Fix UART ACPI device status

Prior to commit d1c0f958d1 ("acpi: Call acpi_fill_ssdt() only for
enabled devices"), uart_inject_ssdt() was used to set the ACPI status
(_STA) for both enabled and disabled devices. The aforementioned commit
limited it to being called only on enabled devices, which left disabled
devices without any _STA method at all -- which the OS assumes means
that the device is present and enabled.

To fix this, create the _STA method in the UART asl code for each port,
and set the return value to a name variable (STAT) which defaults to
0 (not present/disabled). Then, have uart_inject_ssdt() set STAT to
present and enabled (0xF) for UARTs actually present on the board.

TEST=build/boot google/skyrim (frostflow), dump ACPI tables, and verify
that _STA returns 0xF only for UARTs enabled in devicetree.

Change-Id: Id89e74c3ea7f53280935898ee35311b7cf3b152a
Signed-off-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/77092
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

src/soc/amd/cezanne/acpi/mmio.asl

@@ -87,6 +87,12 @@ Device (FUR0)
 		}
 	}
 
+	Name (STAT, 0x0)
+	Method (_STA, 0x0, NotSerialized)
+	{
+		Return (STAT)
+	}
+
 	AOAC_DEVICE(FCH_AOAC_DEV_UART0, 0)
 }
 
@@ -118,6 +124,12 @@ Device (FUR1) {
 		}
 	}
 
+	Name (STAT, 0x0)
+	Method (_STA, 0x0, NotSerialized)
+	{
+		Return (STAT)
+	}
+
 	AOAC_DEVICE(FCH_AOAC_DEV_UART1, 0)
 }
 

src/soc/amd/common/block/uart/uart.c

@@ -67,13 +67,11 @@ static const char *uart_acpi_name(const struct device *dev)
 		return NULL;
 }
 
-/* This gets called for both enabled and disabled devices. */
+/* This gets called for enabled devices only. */
 static void uart_inject_ssdt(const struct device *dev)
 {
 	acpigen_write_scope(acpi_device_path(dev));
-
-	acpigen_write_STA(acpi_device_status(dev));
-
+	acpigen_write_store_int_to_namestr(acpi_device_status(dev), "STAT");
 	acpigen_pop_len(); /* Scope */
 }
 #endif

src/soc/amd/glinda/acpi/mmio.asl

@@ -89,6 +89,12 @@ Device (FUR0)
 		}
 	}
 
+	Name (STAT, 0x0)
+	Method (_STA, 0x0, NotSerialized)
+	{
+		Return (STAT)
+	}
+
 	AOAC_DEVICE(FCH_AOAC_DEV_UART0, 0)
 }
 
@@ -120,6 +126,12 @@ Device (FUR1) {
 		}
 	}
 
+	Name (STAT, 0x0)
+	Method (_STA, 0x0, NotSerialized)
+	{
+		Return (STAT)
+	}
+
 	AOAC_DEVICE(FCH_AOAC_DEV_UART1, 0)
 }
 
@@ -151,6 +163,12 @@ Device (FUR2) {
 		}
 	}
 
+	Name (STAT, 0x0)
+	Method (_STA, 0x0, NotSerialized)
+	{
+		Return (STAT)
+	}
+
 	AOAC_DEVICE(FCH_AOAC_DEV_UART2, 0)
 }
 
@@ -182,6 +200,12 @@ Device (FUR3) {
 		}
 	}
 
+	Name (STAT, 0x0)
+	Method (_STA, 0x0, NotSerialized)
+	{
+		Return (STAT)
+	}
+
 	AOAC_DEVICE(FCH_AOAC_DEV_UART3, 0)
 }
 
@@ -213,6 +237,12 @@ Device (FUR4) {
 		}
 	}
 
+	Name (STAT, 0x0)
+	Method (_STA, 0x0, NotSerialized)
+	{
+		Return (STAT)
+	}
+
 	AOAC_DEVICE(FCH_AOAC_DEV_UART4, 0)
 }
 

src/soc/amd/mendocino/acpi/mmio.asl

@@ -89,6 +89,12 @@ Device (FUR0)
 		}
 	}
 
+	Name (STAT, 0x0)
+	Method (_STA, 0x0, NotSerialized)
+	{
+		Return (STAT)
+	}
+
 	AOAC_DEVICE(FCH_AOAC_DEV_UART0, 0)
 }
 
@@ -120,6 +126,12 @@ Device (FUR1) {
 		}
 	}
 
+	Name (STAT, 0x0)
+	Method (_STA, 0x0, NotSerialized)
+	{
+		Return (STAT)
+	}
+
 	AOAC_DEVICE(FCH_AOAC_DEV_UART1, 0)
 }
 
@@ -151,6 +163,12 @@ Device (FUR2) {
 		}
 	}
 
+	Name (STAT, 0x0)
+	Method (_STA, 0x0, NotSerialized)
+	{
+		Return (STAT)
+	}
+
 	AOAC_DEVICE(FCH_AOAC_DEV_UART2, 0)
 }
 
@@ -182,6 +200,12 @@ Device (FUR3) {
 		}
 	}
 
+	Name (STAT, 0x0)
+	Method (_STA, 0x0, NotSerialized)
+	{
+		Return (STAT)
+	}
+
 	AOAC_DEVICE(FCH_AOAC_DEV_UART3, 0)
 }
 
@@ -213,6 +237,12 @@ Device (FUR4) {
 		}
 	}
 
+	Name (STAT, 0x0)
+	Method (_STA, 0x0, NotSerialized)
+	{
+		Return (STAT)
+	}
+
 	AOAC_DEVICE(FCH_AOAC_DEV_UART4, 0)
 }
 

src/soc/amd/phoenix/acpi/mmio.asl

@@ -89,6 +89,12 @@ Device (FUR0)
 		}
 	}
 
+	Name (STAT, 0x0)
+	Method (_STA, 0x0, NotSerialized)
+	{
+		Return (STAT)
+	}
+
 	AOAC_DEVICE(FCH_AOAC_DEV_UART0, 0)
 }
 
@@ -120,6 +126,12 @@ Device (FUR1) {
 		}
 	}
 
+	Name (STAT, 0x0)
+	Method (_STA, 0x0, NotSerialized)
+	{
+		Return (STAT)
+	}
+
 	AOAC_DEVICE(FCH_AOAC_DEV_UART1, 0)
 }
 
@@ -151,6 +163,12 @@ Device (FUR2) {
 		}
 	}
 
+	Name (STAT, 0x0)
+	Method (_STA, 0x0, NotSerialized)
+	{
+		Return (STAT)
+	}
+
 	AOAC_DEVICE(FCH_AOAC_DEV_UART2, 0)
 }
 
@@ -182,6 +200,12 @@ Device (FUR3) {
 		}
 	}
 
+	Name (STAT, 0x0)
+	Method (_STA, 0x0, NotSerialized)
+	{
+		Return (STAT)
+	}
+
 	AOAC_DEVICE(FCH_AOAC_DEV_UART3, 0)
 }
 
@@ -213,6 +237,12 @@ Device (FUR4) {
 		}
 	}
 
+	Name (STAT, 0x0)
+	Method (_STA, 0x0, NotSerialized)
+	{
+		Return (STAT)
+	}
+
 	AOAC_DEVICE(FCH_AOAC_DEV_UART4, 0)
 }
 

src/soc/amd/picasso/acpi/mmio.asl

@@ -124,6 +124,12 @@ Device (FUR0)
 		}
 	}
 
+	Name (STAT, 0x0)
+	Method (_STA, 0x0, NotSerialized)
+	{
+		Return (STAT)
+	}
+
 	AOAC_DEVICE(FCH_AOAC_DEV_UART0, 0)
 }
 
@@ -157,6 +163,12 @@ Device (FUR1) {
 		}
 	}
 
+	Name (STAT, 0x0)
+	Method (_STA, 0x0, NotSerialized)
+	{
+		Return (STAT)
+	}
+
 	AOAC_DEVICE(FCH_AOAC_DEV_UART1, 0)
 }
 
@@ -190,6 +202,12 @@ Device (FUR2) {
 		}
 	}
 
+	Name (STAT, 0x0)
+	Method (_STA, 0x0, NotSerialized)
+	{
+		Return (STAT)
+	}
+
 	AOAC_DEVICE(FCH_AOAC_DEV_UART2, 0)
 }
 
@@ -223,6 +241,12 @@ Device (FUR3) {
 		}
 	}
 
+	Name (STAT, 0x0)
+	Method (_STA, 0x0, NotSerialized)
+	{
+		Return (STAT)
+	}
+
 	AOAC_DEVICE(FCH_AOAC_DEV_UART3, 0)
 }
 

src/soc/amd/stoneyridge/acpi/mmio.asl

@@ -47,6 +47,11 @@ Device (FUR0)
 		IRQ (Edge, ActiveHigh, Exclusive) { 10 }
 		Memory32Fixed (ReadWrite, APU_UART0_BASE, 0x2000)
 	})
+	Name (STAT, 0x0)
+	Method (_STA, 0x0, NotSerialized)
+	{
+		Return (STAT)
+	}
 }
 
 Device (FUR1) {
@@ -57,6 +62,11 @@ Device (FUR1) {
 			IRQ (Edge, ActiveHigh, Exclusive) { 11 }
 			Memory32Fixed (ReadWrite, APU_UART1_BASE, 0x2000)
 	})
+	Name (STAT, 0x0)
+	Method (_STA, 0x0, NotSerialized)
+	{
+		Return (STAT)
+	}
 }
 
 Device (I2CA) {