lynxpoint: Don't write to non-existent EHCI

The LynxPoint-LP chipset only has one EHCI controller so we should
not attempt to write into the second one that only exists on LynxPoint-H.

Change-Id: I1eae060c7f0a5873c9684e5abfeea5cb5895ab62
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/63799
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/4405
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
This commit is contained in:
Duncan Laurie 2013-07-30 15:45:25 -07:00 committed by Ronald G. Minnich
parent b1ae0303ce
commit 7d14e89c54
2 changed files with 8 additions and 3 deletions

View File

@ -42,6 +42,12 @@ const struct rcba_config_instruction pch_early_config[] = {
RCBA_END_CONFIG, RCBA_END_CONFIG,
}; };
int pch_is_lp(void)
{
u8 id = pci_read_config8(PCH_LPC_DEV, PCI_DEVICE_ID + 1);
return id == PCH_TYPE_LPT_LP;
}
static void pch_enable_bars(void) static void pch_enable_bars(void)
{ {
/* Setting up Southbridge. In the northbridge code. */ /* Setting up Southbridge. In the northbridge code. */

View File

@ -54,7 +54,6 @@ static void enable_usb_bar_on_device(device_t dev, u32 bar)
void enable_usb_bar(void) void enable_usb_bar(void)
{ {
enable_usb_bar_on_device(PCH_EHCI1_DEV, PCH_EHCI1_TEMP_BAR0); enable_usb_bar_on_device(PCH_EHCI1_DEV, PCH_EHCI1_TEMP_BAR0);
#if !CONFIG_INTEL_LYNXPOINT_LP if (!pch_is_lp())
enable_usb_bar_on_device(PCH_EHCI2_DEV, PCH_EHCI2_TEMP_BAR0); enable_usb_bar_on_device(PCH_EHCI2_DEV, PCH_EHCI2_TEMP_BAR0);
#endif
} }