mb/google/volteer/variants/halvor: add two SPD files

Adds SPD_LPDDR4X_556b_1R_32Gb_8GbD_QDP_4267.spd.hex, which will be used
initially for the "H9HKNNNCRMBVAR-NEH" SKhynix part as DRAM ID #0.

Adds SPD_LPDDR4X_556b_1R_64Gb_16GbD_QDP_4267.spd.hex, which will be
used initially for the "MT53E1G64D4SQ-046 WT:A" Micron part as
DRAM ID #1.

BUG=b:155423877
TEST=none

Change-Id: I5580f602cd411e415dafcb36bd1ffa43c4f02f60
Signed-off-by: Nick Vaccaro <nvaccaro@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41076
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Nick Vaccaro 2020-05-05 18:23:43 -07:00 committed by Patrick Georgi
parent bc867d5b1d
commit 7d1a4b2584
3 changed files with 67 additions and 1 deletions

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@ -1,6 +1,8 @@
# SPDX-License-Identifier: GPL-2.0-only # SPDX-License-Identifier: GPL-2.0-only
SPD_SOURCES = ## Memory Options # DRAM ID # Part Num
SPD_SOURCES = SPD_LPDDR4X_556b_1R_32Gb_8GbD_QDP_4267 # b0000 # H9HKNNNCRMBVAR-NEH
SPD_SOURCES += SPD_LPDDR4X_556b_1R_64Gb_16GbD_QDP_4267 # b0001 # MT53E1G64D4SQ-046 WT:A
bootblock-y += gpio.c bootblock-y += gpio.c

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