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AGESA f15: Drop CAR teardown without POSTCAR_STAGE 

Change-Id: Ie5ff62ee1c7ca193ba841c5b2fb20940ec657625
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/21467
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
This commit is contained in:
Kyösti Mälkki 2017-09-07 06:47:07 +03:00 committed by Martin Roth
parent bc81b67c9d
commit 7d3f23ac48
1 changed files with 4 additions and 45 deletions
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49
src/vendorcode/amd/agesa/f15/gcccar.inc
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@ -361,13 +361,6 @@ fam10_enable_stack_hook_exit:
* Return any family specific controls to their 'standard' * Return any family specific controls to their 'standard'
* settings for using cache with main memory. * settings for using cache with main memory.
* *
* Note: Customized for coreboot:
* A wbinvd is used to send cache to memory. The existing stack is preserved
* at its original location and additional information is preserved (e.g.
* coreboot CAR globals, heap structures, etc.). This implementation should
* NOT be used with S3 resume IF the stack/cache area is not reserved and
* over system memory.
*
* Inputs: * Inputs:
* ESI - [31:24] flags; [15,8]= Node#; [7,0]= core# * ESI - [31:24] flags; [15,8]= Node#; [7,0]= core#
* Outputs: * Outputs:
@ -427,18 +420,7 @@ fam10_enable_stack_hook_exit:
mov %ax, %bx # Save INVD -> WBINVD bit mov %ax, %bx # Save INVD -> WBINVD bit
btr $INVD_WBINVD, %eax # Disable INVD -> WBINVD conversion for the invd instruction. btr $INVD_WBINVD, %eax # Disable INVD -> WBINVD conversion for the invd instruction.
_WRMSR _WRMSR
invd # Clear the cache tag RAMs
#--------------------------------------------------------------------------
# Send cache to memory. Preserve stack and coreboot CAR globals.
# This shouldn't be used with S3 resume IF the stack/cache area is
# not reserved and over system memory.
#--------------------------------------------------------------------------
#if !IS_ENABLED(CONFIG_POSTCAR_STAGE)
wbinvd
#else
invd
#endif
mov %bx, %ax # Restore INVD -> WBINVD bit mov %bx, %ax # Restore INVD -> WBINVD bit
_WRMSR _WRMSR
@ -957,13 +939,6 @@ fam15_enable_stack_hook_exit:
* Return any family specific controls to their 'standard' * Return any family specific controls to their 'standard'
* settings for using cache with main memory. * settings for using cache with main memory.
* *
* Note: Customized for coreboot:
* A wbinvd is used to send cache to memory. The existing stack is preserved
* at its original location and additional information is preserved (e.g.
* coreboot CAR globals, heap structures, etc.). This implementation should
* NOT be used with S3 resume IF the stack/cache area is not reserved and
* over system memory.
*
* Inputs: * Inputs:
* ESI - [31:24] flags; [15,8]= Node#; [7,0]= core# * ESI - [31:24] flags; [15,8]= Node#; [7,0]= core#
* Outputs: * Outputs:
@ -1022,14 +997,7 @@ fam15_enable_stack_hook_exit:
_RDMSR _RDMSR
btr $INVD_WBINVD, %eax # Disable INVD -> WBINVD conversion btr $INVD_WBINVD, %eax # Disable INVD -> WBINVD conversion
_WRMSR _WRMSR
invd # Clear the cache tag RAMs
#--------------------------------------------------------------------------
# Send cache to memory. Preserve stack and coreboot CAR globals.
# This shouldn't be used with S3 resume IF the stack/cache area is
# not reserved and over system memory.
#--------------------------------------------------------------------------
wbinvd
bts $INVD_WBINVD, %eax # Turn on Conversion of INVD to WBINVD bts $INVD_WBINVD, %eax # Turn on Conversion of INVD to WBINVD
_WRMSR _WRMSR
#.endif # end #.endif # end
@ -1606,17 +1574,8 @@ ClearTheStack: # Stack base is in SS, stack pointer is
.endm .endm
/***************************************************************************** /*****************************************************************************
* AMD_DISABLE_STACK: Implementation is modified for coreboot from * AMD_DISABLE_STACK: Destroy the stack inside the cache. This routine
* the original AMD intent. A WBINVD is used in the HOOK * should only be executed on the BSP
* to send dirty cache contents to DRAM backing before
* disabling cache-as-ram. This is not safe for S3 resume.
*
* todo:
* * rework PI/AGESA source to set DRAM to UC to send
* writes directly to memory
* * move DCACHE_BASE or use postcar stage for teardown
* to eliminate car_migrated problem that will occur
* after wbinvd is changed back to invd
* *
* In: * In:
* none * none