mb/asrock/h110m: set I/O Range for SuperIO HWM

Change-Id: I30de4f40f8ca87c54faee84053c4bb0f874b2884
Signed-off-by: Maxim Polyakov <max.senia.poliak@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35369
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Maxim Polyakov 2019-09-11 18:56:24 +03:00 committed by Felix Held
parent b3f24b4884
commit 7d549f8908
1 changed files with 3 additions and 0 deletions

View File

@ -33,6 +33,9 @@ chip soc/intel/skylake
register "gpe0_dw1" = "GPP_D" register "gpe0_dw1" = "GPP_D"
register "gpe0_dw2" = "GPP_E" register "gpe0_dw2" = "GPP_E"
# Set @0x280-0x2ff I/O Range for SuperIO HWM
register "gen1_dec" = "0x007c0281"
# Enable "Intel Speed Shift Technology" # Enable "Intel Speed Shift Technology"
register "speed_shift_enable" = "1" register "speed_shift_enable" = "1"