util/amdfwtool/amdfwtool: Don't rewrite macros

Change-Id: Iea9dc65584c751e4d02524582b744ec9732e2c04
Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/68376
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
This commit is contained in:
Elyes Haouas 2022-10-14 09:58:29 +02:00 committed by Felix Held
parent b291dc8776
commit 7d67a19cfa
2 changed files with 28 additions and 29 deletions

View File

@ -46,6 +46,7 @@
* *
*/ */
#include <commonlib/bsd/helpers.h>
#include <fcntl.h> #include <fcntl.h>
#include <errno.h> #include <errno.h>
#include <openssl/sha.h> #include <openssl/sha.h>
@ -65,7 +66,6 @@
#define AMD_ROMSIG_OFFSET 0x20000 #define AMD_ROMSIG_OFFSET 0x20000
#define MIN_ROM_KB 256 #define MIN_ROM_KB 256
#define ALIGN(val, by) (((val) + (by) - 1) & ~((by) - 1))
#define _MAX(A, B) (((A) > (B)) ? (A) : (B)) #define _MAX(A, B) (((A) > (B)) ? (A) : (B))
#define ERASE_ALIGNMENT 0x1000U #define ERASE_ALIGNMENT 0x1000U
#define TABLE_ALIGNMENT 0x1000U #define TABLE_ALIGNMENT 0x1000U
@ -443,9 +443,9 @@ static void *new_psp_dir(context *ctx, int multi)
* if secondary is reprogrammed. * if secondary is reprogrammed.
*/ */
if (multi) if (multi)
ctx->current = ALIGN(ctx->current, TABLE_ERASE_ALIGNMENT); ctx->current = ALIGN_UP(ctx->current, TABLE_ERASE_ALIGNMENT);
else else
ctx->current = ALIGN(ctx->current, TABLE_ALIGNMENT); ctx->current = ALIGN_UP(ctx->current, TABLE_ALIGNMENT);
ptr = BUFF_CURRENT(*ctx); ptr = BUFF_CURRENT(*ctx);
((psp_directory_header *)ptr)->num_entries = 0; ((psp_directory_header *)ptr)->num_entries = 0;
@ -459,7 +459,7 @@ static void *new_psp_dir(context *ctx, int multi)
static void *new_ish_dir(context *ctx) static void *new_ish_dir(context *ctx)
{ {
void *ptr; void *ptr;
ctx->current = ALIGN(ctx->current, TABLE_ALIGNMENT); ctx->current = ALIGN_UP(ctx->current, TABLE_ALIGNMENT);
ptr = BUFF_CURRENT(*ctx); ptr = BUFF_CURRENT(*ctx);
ctx->current += TABLE_ALIGNMENT; ctx->current += TABLE_ALIGNMENT;
return ptr; return ptr;
@ -469,7 +469,7 @@ static void *new_combo_dir(context *ctx)
{ {
void *ptr; void *ptr;
ctx->current = ALIGN(ctx->current, TABLE_ALIGNMENT); ctx->current = ALIGN_UP(ctx->current, TABLE_ALIGNMENT);
ptr = BUFF_CURRENT(*ctx); ptr = BUFF_CURRENT(*ctx);
ctx->current += sizeof(psp_combo_header) ctx->current += sizeof(psp_combo_header)
+ MAX_COMBO_ENTRIES * sizeof(psp_combo_entry); + MAX_COMBO_ENTRIES * sizeof(psp_combo_entry);
@ -491,7 +491,7 @@ static void fill_dir_header(void *directory, uint32_t count, uint32_t cookie, co
} }
/* The table size needs to be 0x1000 aligned. So align the end of table. */ /* The table size needs to be 0x1000 aligned. So align the end of table. */
ctx->current = ALIGN(ctx->current, TABLE_ALIGNMENT); ctx->current = ALIGN_UP(ctx->current, TABLE_ALIGNMENT);
switch (cookie) { switch (cookie) {
case PSP2_COOKIE: case PSP2_COOKIE:
@ -782,13 +782,13 @@ static void integrate_firmwares(context *ctx,
uint32_t i; uint32_t i;
ctx->current += sizeof(embedded_firmware); ctx->current += sizeof(embedded_firmware);
ctx->current = ALIGN(ctx->current, BLOB_ALIGNMENT); ctx->current = ALIGN_UP(ctx->current, BLOB_ALIGNMENT);
for (i = 0; fw_table[i].type != AMD_FW_INVALID; i++) { for (i = 0; fw_table[i].type != AMD_FW_INVALID; i++) {
if (fw_table[i].filename != NULL) { if (fw_table[i].filename != NULL) {
switch (fw_table[i].type) { switch (fw_table[i].type) {
case AMD_FW_IMC: case AMD_FW_IMC:
ctx->current = ALIGN(ctx->current, 0x10000U); ctx->current = ALIGN_UP(ctx->current, 0x10000U);
romsig->imc_entry = RUN_CURRENT(*ctx); romsig->imc_entry = RUN_CURRENT(*ctx);
break; break;
case AMD_FW_GEC: case AMD_FW_GEC:
@ -809,7 +809,7 @@ static void integrate_firmwares(context *ctx,
exit(1); exit(1);
} }
ctx->current = ALIGN(ctx->current + bytes, ctx->current = ALIGN_UP(ctx->current + bytes,
BLOB_ALIGNMENT); BLOB_ALIGNMENT);
} }
} }
@ -1194,7 +1194,7 @@ static void integrate_psp_firmwares(context *ctx,
} }
current_table_save = ctx->current_table; current_table_save = ctx->current_table;
ctx->current_table = (char *)pspdir - ctx->rom; ctx->current_table = (char *)pspdir - ctx->rom;
ctx->current = ALIGN(ctx->current, TABLE_ALIGNMENT); ctx->current = ALIGN_UP(ctx->current, TABLE_ALIGNMENT);
for (i = 0, count = 0; fw_table[i].type != AMD_FW_INVALID; i++) { for (i = 0, count = 0; fw_table[i].type != AMD_FW_INVALID; i++) {
if (!(fw_table[i].level & level)) if (!(fw_table[i].level & level))
@ -1205,14 +1205,14 @@ static void integrate_psp_firmwares(context *ctx,
if (fw_table[i].type == AMD_TOKEN_UNLOCK) { if (fw_table[i].type == AMD_TOKEN_UNLOCK) {
if (!fw_table[i].other) if (!fw_table[i].other)
continue; continue;
ctx->current = ALIGN(ctx->current, ERASE_ALIGNMENT); ctx->current = ALIGN_UP(ctx->current, ERASE_ALIGNMENT);
pspdir->entries[count].type = fw_table[i].type; pspdir->entries[count].type = fw_table[i].type;
pspdir->entries[count].size = 4096; /* TODO: doc? */ pspdir->entries[count].size = 4096; /* TODO: doc? */
pspdir->entries[count].addr = RUN_CURRENT(*ctx); pspdir->entries[count].addr = RUN_CURRENT(*ctx);
pspdir->entries[count].address_mode = SET_ADDR_MODE_BY_TABLE(pspdir); pspdir->entries[count].address_mode = SET_ADDR_MODE_BY_TABLE(pspdir);
pspdir->entries[count].subprog = fw_table[i].subprog; pspdir->entries[count].subprog = fw_table[i].subprog;
pspdir->entries[count].rsvd = 0; pspdir->entries[count].rsvd = 0;
ctx->current = ALIGN(ctx->current + 4096, 0x100U); ctx->current = ALIGN_UP(ctx->current + 4096, 0x100U);
count++; count++;
} else if (fw_table[i].type == AMD_PSP_FUSE_CHAIN) { } else if (fw_table[i].type == AMD_PSP_FUSE_CHAIN) {
pspdir->entries[count].type = fw_table[i].type; pspdir->entries[count].type = fw_table[i].type;
@ -1228,13 +1228,13 @@ static void integrate_psp_firmwares(context *ctx,
continue; continue;
size = fw_table[i].size; size = fw_table[i].size;
addr = fw_table[i].dest; addr = fw_table[i].dest;
if (addr != ALIGN(addr, ERASE_ALIGNMENT)) { if (addr != ALIGN_UP(addr, ERASE_ALIGNMENT)) {
fprintf(stderr, fprintf(stderr,
"Error: PSP NVRAM section not aligned with erase block size.\n\n"); "Error: PSP NVRAM section not aligned with erase block size.\n\n");
exit(1); exit(1);
} }
} else { } else {
ctx->current = ALIGN(ctx->current, ERASE_ALIGNMENT); ctx->current = ALIGN_UP(ctx->current, ERASE_ALIGNMENT);
bytes = copy_blob(BUFF_CURRENT(*ctx), bytes = copy_blob(BUFF_CURRENT(*ctx),
fw_table[i].filename, BUFF_ROOM(*ctx)); fw_table[i].filename, BUFF_ROOM(*ctx));
if (bytes <= 0) { if (bytes <= 0) {
@ -1242,9 +1242,9 @@ static void integrate_psp_firmwares(context *ctx,
exit(1); exit(1);
} }
size = ALIGN(bytes, ERASE_ALIGNMENT); size = ALIGN_UP(bytes, ERASE_ALIGNMENT);
addr = RUN_CURRENT(*ctx); addr = RUN_CURRENT(*ctx);
ctx->current = ALIGN(ctx->current + bytes, ctx->current = ALIGN_UP(ctx->current + bytes,
BLOB_ERASE_ALIGNMENT); BLOB_ERASE_ALIGNMENT);
} }
@ -1275,7 +1275,7 @@ static void integrate_psp_firmwares(context *ctx,
pspdir->entries[count].addr = RUN_CURRENT(*ctx); pspdir->entries[count].addr = RUN_CURRENT(*ctx);
pspdir->entries[count].address_mode = pspdir->entries[count].address_mode =
SET_ADDR_MODE_BY_TABLE(pspdir); SET_ADDR_MODE_BY_TABLE(pspdir);
ctx->current = ALIGN(ctx->current + bytes, ctx->current = ALIGN_UP(ctx->current + bytes,
BLOB_ALIGNMENT); BLOB_ALIGNMENT);
} }
@ -1373,9 +1373,9 @@ static void *new_bios_dir(context *ctx, bool multi)
* if secondary is reprogrammed. * if secondary is reprogrammed.
*/ */
if (multi) if (multi)
ctx->current = ALIGN(ctx->current, TABLE_ERASE_ALIGNMENT); ctx->current = ALIGN_UP(ctx->current, TABLE_ERASE_ALIGNMENT);
else else
ctx->current = ALIGN(ctx->current, TABLE_ALIGNMENT); ctx->current = ALIGN_UP(ctx->current, TABLE_ALIGNMENT);
ptr = BUFF_CURRENT(*ctx); ptr = BUFF_CURRENT(*ctx);
((bios_directory_hdr *) ptr)->additional_info = 0; ((bios_directory_hdr *) ptr)->additional_info = 0;
((bios_directory_hdr *) ptr)->additional_info_fields.address_mode = ctx->address_mode; ((bios_directory_hdr *) ptr)->additional_info_fields.address_mode = ctx->address_mode;
@ -1457,7 +1457,7 @@ static void integrate_bios_firmwares(context *ctx,
else else
level = BDT_BOTH; level = BDT_BOTH;
ctx->current = ALIGN(ctx->current, TABLE_ALIGNMENT); ctx->current = ALIGN_UP(ctx->current, TABLE_ALIGNMENT);
for (i = 0, count = 0; fw_table[i].type != AMD_BIOS_INVALID; i++) { for (i = 0, count = 0; fw_table[i].type != AMD_BIOS_INVALID; i++) {
if (!(fw_table[i].level & level)) if (!(fw_table[i].level & level))
@ -1541,7 +1541,7 @@ static void integrate_bios_firmwares(context *ctx,
SET_ADDR_MODE_BY_TABLE(biosdir); SET_ADDR_MODE_BY_TABLE(biosdir);
memset(BUFF_CURRENT(*ctx), 0xff, memset(BUFF_CURRENT(*ctx), 0xff,
biosdir->entries[count].size); biosdir->entries[count].size);
ctx->current = ALIGN(ctx->current ctx->current = ALIGN_UP(ctx->current
+ biosdir->entries[count].size, 0x100U); + biosdir->entries[count].size, 0x100U);
break; break;
case AMD_BIOS_APOB: case AMD_BIOS_APOB:
@ -1558,11 +1558,11 @@ static void integrate_bios_firmwares(context *ctx,
biosdir->entries[count].size = fw_table[i].size; biosdir->entries[count].size = fw_table[i].size;
} else { } else {
/* Else reserve size bytes within amdfw.rom */ /* Else reserve size bytes within amdfw.rom */
ctx->current = ALIGN(ctx->current, ERASE_ALIGNMENT); ctx->current = ALIGN_UP(ctx->current, ERASE_ALIGNMENT);
biosdir->entries[count].source = RUN_CURRENT(*ctx); biosdir->entries[count].source = RUN_CURRENT(*ctx);
biosdir->entries[count].address_mode = biosdir->entries[count].address_mode =
SET_ADDR_MODE(biosdir, AMD_ADDR_REL_BIOS); SET_ADDR_MODE(biosdir, AMD_ADDR_REL_BIOS);
biosdir->entries[count].size = ALIGN( biosdir->entries[count].size = ALIGN_UP(
fw_table[i].size, ERASE_ALIGNMENT); fw_table[i].size, ERASE_ALIGNMENT);
memset(BUFF_CURRENT(*ctx), 0xff, memset(BUFF_CURRENT(*ctx), 0xff,
biosdir->entries[count].size); biosdir->entries[count].size);
@ -1602,7 +1602,7 @@ static void integrate_bios_firmwares(context *ctx,
biosdir->entries[count].address_mode = biosdir->entries[count].address_mode =
SET_ADDR_MODE(biosdir, AMD_ADDR_REL_BIOS); SET_ADDR_MODE(biosdir, AMD_ADDR_REL_BIOS);
ctx->current = ALIGN(ctx->current + bytes, 0x100U); ctx->current = ALIGN_UP(ctx->current + bytes, 0x100U);
break; break;
case AMD_BIOS_PSP_SHARED_MEM: case AMD_BIOS_PSP_SHARED_MEM:
biosdir->entries[count].dest = fw_table[i].dest; biosdir->entries[count].dest = fw_table[i].dest;
@ -1612,7 +1612,7 @@ static void integrate_bios_firmwares(context *ctx,
default: /* everything else is copied from input */ default: /* everything else is copied from input */
if (fw_table[i].type == AMD_BIOS_APCB || if (fw_table[i].type == AMD_BIOS_APCB ||
fw_table[i].type == AMD_BIOS_APCB_BK) fw_table[i].type == AMD_BIOS_APCB_BK)
ctx->current = ALIGN( ctx->current = ALIGN_UP(
ctx->current, ERASE_ALIGNMENT); ctx->current, ERASE_ALIGNMENT);
bytes = copy_blob(BUFF_CURRENT(*ctx), bytes = copy_blob(BUFF_CURRENT(*ctx),
fw_table[i].filename, BUFF_ROOM(*ctx)); fw_table[i].filename, BUFF_ROOM(*ctx));
@ -1625,7 +1625,7 @@ static void integrate_bios_firmwares(context *ctx,
biosdir->entries[count].source = RUN_CURRENT(*ctx); biosdir->entries[count].source = RUN_CURRENT(*ctx);
biosdir->entries[count].address_mode = SET_ADDR_MODE_BY_TABLE(biosdir); biosdir->entries[count].address_mode = SET_ADDR_MODE_BY_TABLE(biosdir);
ctx->current = ALIGN(ctx->current + bytes, 0x100U); ctx->current = ALIGN_UP(ctx->current + bytes, 0x100U);
break; break;
} }
@ -2382,7 +2382,7 @@ int main(int argc, char **argv)
integrate_firmwares(&ctx, amd_romsig, amd_fw_table); integrate_firmwares(&ctx, amd_romsig, amd_fw_table);
ctx.current = ALIGN(ctx.current, 0x10000U); /* TODO: is it necessary? */ ctx.current = ALIGN_UP(ctx.current, 0x10000U); /* TODO: is it necessary? */
ctx.current_table = 0; ctx.current_table = 0;
/* If the tool is invoked with command-line options to keep the signed PSP /* If the tool is invoked with command-line options to keep the signed PSP

View File

@ -4,6 +4,7 @@
#define _AMD_FW_TOOL_H_ #define _AMD_FW_TOOL_H_
#include <commonlib/bsd/compiler.h> #include <commonlib/bsd/compiler.h>
#include <commonlib/bsd/helpers.h>
#include <openssl/sha.h> #include <openssl/sha.h>
#include <stdint.h> #include <stdint.h>
#include <stdbool.h> #include <stdbool.h>
@ -373,6 +374,4 @@ uint8_t process_config(FILE *config, amd_cb_config *cb_config, uint8_t print_dep
#define LINE_EOF (1) #define LINE_EOF (1)
#define LINE_TOO_LONG (2) #define LINE_TOO_LONG (2)
#define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0]))
#endif /* _AMD_FW_TOOL_H_ */ #endif /* _AMD_FW_TOOL_H_ */