soc/intel/elkhartlake: Update SerialIO devices details

Add I2C #6 & #7 and remove GSPI #3 as per EHL EDS.
Also update device function number for GSPI #2 in asl file.

Signed-off-by: Tan, Lean Sheng <lean.sheng.tan@intel.com>
Change-Id: If166fefe567a857ca29527d0367197139efbf6c7
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48540
Reviewed-by: Frans Hendriks <fhendriks@eltan.com>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

src/soc/intel/elkhartlake/acpi/serialio.asl

@@ -38,6 +38,18 @@ Device (I2C5)
 	Name (_DDN, "Serial IO I2C Controller 5")
 }
 
+Device (I2C6)
+{
+	Name (_ADR, 0x00100000)
+	Name (_DDN, "Serial IO I2C Controller 6")
+}
+
+Device (I2C7)
+{
+	Name (_ADR, 0x00100001)
+	Name (_DDN, "Serial IO I2C Controller 7")
+}
+
 Device (SPI0)
 {
 	Name (_ADR, 0x001e0002)
@@ -52,16 +64,10 @@ Device (SPI1)
 
 Device (SPI2)
 {
-	Name (_ADR, 0x00120006)
+	Name (_ADR, 0x00120000)
 	Name (_DDN, "Serial IO SPI Controller 2")
 }
 
-Device (SPI3)
-{
-	Name (_ADR, 0x00130000)
-	Name (_DDN, "Serial IO SPI Controller 3")
-}
-
 Device (UAR0)
 {
 	Name (_ADR, 0x001e0000)

src/soc/intel/elkhartlake/fsp_params.c

@@ -34,6 +34,8 @@ static const pci_devfn_t serial_io_dev[] = {
 	PCH_DEVFN_I2C3,
 	PCH_DEVFN_I2C4,
 	PCH_DEVFN_I2C5,
+	PCH_DEVFN_I2C6,
+	PCH_DEVFN_I2C7,
 	PCH_DEVFN_GSPI0,
 	PCH_DEVFN_GSPI1,
 	PCH_DEVFN_GSPI2,

src/soc/intel/elkhartlake/i2c.c

@@ -19,6 +19,10 @@ int dw_i2c_soc_devfn_to_bus(unsigned int devfn)
 		return 4;
 	case PCH_DEVFN_I2C5:
 		return 5;
+	case PCH_DEVFN_I2C6:
+		return 6;
+	case PCH_DEVFN_I2C7:
+		return 7;
 	}
 	return -1;
 }
@@ -38,6 +42,10 @@ int dw_i2c_soc_bus_to_devfn(unsigned int bus)
 		return PCH_DEVFN_I2C4;
 	case 5:
 		return PCH_DEVFN_I2C5;
+	case 6:
+		return PCH_DEVFN_I2C6;
+	case 7:
+		return PCH_DEVFN_I2C7;
 	}
 	return -1;
 }

src/soc/intel/elkhartlake/include/soc/serialio.h

@@ -18,13 +18,14 @@ enum {
 	PchSerialIoIndexI2C3,
 	PchSerialIoIndexI2C4,
 	PchSerialIoIndexI2C5,
+	PchSerialIoIndexI2C6,
+	PchSerialIoIndexI2C7,
 };
 
 enum {
 	PchSerialIoIndexGSPI0,
 	PchSerialIoIndexGSPI1,
 	PchSerialIoIndexGSPI2,
-	PchSerialIoIndexGSPI3,
 };
 
 enum {