mb/lenovo/*/devicetree: Add support for WWAN detection

Add support for WWAN detection on SNB/IVB boards that have
schematics or are available for testing.

Tested on Lenovo T430.

Change-Id: Ie96b2593971d49703eb747ab19f512be890d9c12
Signed-off-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-on: https://review.coreboot.org/20984
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Patrick Rudolph 2017-08-13 12:51:27 +02:00 committed by Felix Held
parent e830513def
commit 7d7c631066
6 changed files with 24 additions and 0 deletions

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@ -150,6 +150,10 @@ chip northbridge/intel/sandybridge
register "has_bdc_detection" = "1"
register "bdc_gpio_num" = "54"
register "bdc_gpio_lvl" = "0"
register "has_wwan_detection" = "1"
register "wwan_gpio_num" = "70"
register "wwan_gpio_lvl" = "0"
end
chip drivers/lenovo/hybrid_graphics
device pnp ff.f on end # dummy

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@ -133,6 +133,10 @@ chip northbridge/intel/sandybridge
register "has_bdc_detection" = "1"
register "bdc_gpio_num" = "54"
register "bdc_gpio_lvl" = "0"
register "has_wwan_detection" = "1"
register "wwan_gpio_num" = "70"
register "wwan_gpio_lvl" = "0"
end
chip drivers/lenovo/hybrid_graphics
device pnp ff.f on end # dummy

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@ -140,6 +140,10 @@ chip northbridge/intel/sandybridge
register "has_bdc_detection" = "1"
register "bdc_gpio_num" = "54"
register "bdc_gpio_lvl" = "0"
register "has_wwan_detection" = "1"
register "wwan_gpio_num" = "70"
register "wwan_gpio_lvl" = "0"
end
chip drivers/lenovo/hybrid_graphics
device pnp ff.f on end # dummy

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@ -159,6 +159,10 @@ chip northbridge/intel/sandybridge
register "has_bdc_detection" = "1"
register "bdc_gpio_num" = "54"
register "bdc_gpio_lvl" = "0"
register "has_wwan_detection" = "1"
register "wwan_gpio_num" = "70"
register "wwan_gpio_lvl" = "0"
end
end # LPC bridge
device pci 1f.2 on

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@ -170,6 +170,10 @@ chip northbridge/intel/sandybridge
# BDC's connector pin14 is left floating
# BDC's connector pin1 is routed to SB GPIO 54
register "has_bdc_detection" = "0"
register "has_wwan_detection" = "1"
register "wwan_gpio_num" = "70"
register "wwan_gpio_lvl" = "0"
end
end # LPC bridge
device pci 1f.2 on

View File

@ -172,6 +172,10 @@ chip northbridge/intel/sandybridge
# BDC's connector pin14 is left floating
# BDC's connector pin1 is routed to SB GPIO 54
register "has_bdc_detection" = "0"
register "has_wwan_detection" = "1"
register "wwan_gpio_num" = "70"
register "wwan_gpio_lvl" = "0"
end
end # LPC bridge
device pci 1f.2 on