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sb/amd/agesa: Fix some white spaces issues 

Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Change-Id: I1497c7589570b8ff3873149a0fb212bad96ad432
Reviewed-on: https://review.coreboot.org/c/coreboot/+/65902
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
This commit is contained in:
Elyes Haouas 2022-07-16 09:49:53 +02:00 committed by Martin L Roth
parent 644a67c116
commit 7d89264cdf
4 changed files with 6 additions and 6 deletions
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2
src/southbridge/amd/agesa/hudson/imc.c
View File

@ -32,7 +32,7 @@ void imc_reg_init(void)
UINT8 PciData;
PCI_ADDR PciAddress;
AMD_CONFIG_PARAMS StdHeader;
PciAddress.AddressValue = MAKE_SBDFO (0, 0, 0x18, 0x3, 0x1E4);
PciAddress.AddressValue = MAKE_SBDFO(0, 0, 0x18, 0x3, 0x1E4);
LibAmdPciRead(AccessWidth8, PciAddress, &PciData, &StdHeader);
PciData &= (UINT8)0x8F;
PciData |= 0x10;

2
src/southbridge/amd/agesa/hudson/lpc.c
View File

@ -244,7 +244,7 @@ static void hudson_lpc_enable_childrens_resources(struct device *dev)
default:
rsize = 0;
/* try AGESA allocated region in region 0 */
if ((var_num > 0) && ((base >=reg_var[0]) &&
if ((var_num > 0) && ((base >= reg_var[0]) &&
((base + res->size) <= (reg_var[0] + reg_size[0]))))
rsize = reg_size[0];
}

6
src/southbridge/amd/agesa/hudson/reset.c
View File

@ -8,9 +8,9 @@
#include <reset.h>
#define HT_INIT_CONTROL 0x6c
#define HTIC_ColdR_Detect (1<<4)
#define HTIC_BIOSR_Detect (1<<5)
#define HTIC_INIT_Detect (1<<6)
#define HTIC_ColdR_Detect (1 << 4)
#define HTIC_BIOSR_Detect (1 << 5)
#define HTIC_INIT_Detect (1 << 6)
void cf9_reset_prepare(void)
{

2
src/southbridge/amd/agesa/hudson/resume.c
View File

@ -98,7 +98,7 @@ static void s3_resume_init_data(FCH_DATA_BLOCK *FchParams)
int i;
for (i = 0; i < sizeof(FchParams); i++) {
printk(BIOS_DEBUG, " %02x", ((u8 *) FchParams)[i]);
printk(BIOS_DEBUG, " %02x", ((u8 *)FchParams)[i]);
if ((i % 16) == 15)
printk(BIOS_DEBUG, "\n");
}