Drop dumpmcrr
This utility is AMD SC520 specific (and AMD SC520 support has been dropped from coreboot) Change-Id: I8ebd52c2e6af113d2110c106f88fdd7c0a672c98 Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-on: http://review.coreboot.org/10120 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
This commit is contained in:
Stefan Reinauer
parent
3a34b411ca
commit
7d898497c0
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@ -1,5 +0,0 @@
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dumpmmcr: dumpmmcr.c
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gcc -m32 -Os -static -o dumpmmcr dumpmmcr.c
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strip -s dumpmmcr
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clean:
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rm dumpmmcr
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@ -1,313 +0,0 @@
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/*
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* dump mmcr of Elan520 uController (incomplete, see 22005b pg23+).
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*
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* Copyright 2005 Ronald G. Minnich
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* Copyright 2006 coresystems GmbH
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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#include <errno.h>
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#include <fcntl.h>
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#include <sys/mman.h>
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#include <unistd.h>
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#include <stdio.h>
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#include <string.h>
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#include <stdlib.h>
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#include <stdint.h>
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#include <getopt.h>
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#include "../../src/include/cpu/amd/sc520.h"
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#define val(x,y) (x->y)
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int print_mmcr(struct mmcr *mmcr)
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{
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int i;
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printf("revid is 0x%x\n\n", val(mmcr, revid));
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printf("cpucontrol is 0x%x\n\n", val(mmcr, cpucontrol));
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printf("\n");
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printf("drcctl is 0x%x\n", val(mmcr, memregs.drcctl));
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printf("drctmctl is 0x%x\n", val(mmcr, memregs.drctmctl));
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printf("drccfg is 0x%x\n", val(mmcr, memregs.drccfg));
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printf("bendaddr is 0x%02x%02x%02x%02x\n",
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val(mmcr, memregs.drcbendadr[3]),
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val(mmcr, memregs.drcbendadr[2]),
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val(mmcr, memregs.drcbendadr[1]),
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val(mmcr, memregs.drcbendadr[0]));
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printf("eccctl is 0x%x\n", val(mmcr, memregs.eccctl));
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printf("eccsta is 0x%x\n", val(mmcr, memregs.eccsta));
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printf("ckbpos is 0x%x\n", val(mmcr, memregs.eccckbpos));
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printf("cktest is 0x%x\n", val(mmcr, memregs.ecccktest));
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printf("sbadd is 0x%lx\n", val(mmcr, memregs.eccsbadd));
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printf("mbadd is 0x%lx\n", val(mmcr, memregs.eccmbadd));
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printf("\n");
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printf("dbctl is 0x%x\n", val(mmcr, dbctl.dbctl));
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printf("\n");
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printf("bootcs is 0x%x\n", val(mmcr, romregs.bootcs));
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printf("romcs1 is 0x%x\n", val(mmcr, romregs.romcs1));
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printf("romcs2 is 0x%x\n", val(mmcr, romregs.romcs2));
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printf("\n");
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printf("hbctl is 0x%x\n", val(mmcr, hostbridge.ctl));
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printf("hbtgtirqctl is 0x%x\n", val(mmcr, hostbridge.tgtirqctl));
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printf("hbtgtirqsta is 0x%x\n", val(mmcr, hostbridge.tgtirqsta));
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printf("hbmstirqctl is 0x%x\n", val(mmcr, hostbridge.mstirqctl));
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printf("hbmstirqsta is 0x%x\n", val(mmcr, hostbridge.mstirqsta));
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printf("mstintadd is 0x%lx\n", val(mmcr, hostbridge.mstintadd));
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printf("\n");
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printf("sysarbctl is 0x%x\n", val(mmcr, sysarb.ctl));
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printf("pciarbsta is 0x%x\n", val(mmcr, sysarb.sta));
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printf("sysarbmenb is 0x%x\n", val(mmcr, sysarb.menb));
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printf("arbprictl is 0x%lx\n", val(mmcr, sysarb.prictl));
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printf("\n");
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printf("adddecctl is 0x%x\n", val(mmcr, sysmap.adddecctl));
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printf("wpvsta is 0x%x\n", val(mmcr, sysmap.wpvsta));
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for (i=0; i<16; i++)
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printf("par %d is 0x%lx\n", i, val(mmcr, sysmap.par[i]));
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printf("\n");
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printf("gpecho is 0x%x\n", val(mmcr, gpctl.gpecho));
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printf("gpcsdw is 0x%x\n", val(mmcr, gpctl.gpcsdw));
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printf("gpcsqual is 0x%x\n", val(mmcr, gpctl.gpcsqual));
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printf("gpcsrt is 0x%x\n", val(mmcr, gpctl.gpcsrt));
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printf("gpcspw is 0x%x\n", val(mmcr, gpctl.gpcspw));
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printf("gpcsoff is 0x%x\n", val(mmcr, gpctl.gpcsoff));
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printf("gprdw is 0x%x\n", val(mmcr, gpctl.gprdw));
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printf("gprdoff is 0x%x\n", val(mmcr, gpctl.gprdoff));
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printf("gpwrw is 0x%x\n", val(mmcr, gpctl.gpwrw));
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printf("gpwroff is 0x%x\n", val(mmcr, gpctl.gpwroff));
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printf("gpalew is 0x%x\n", val(mmcr, gpctl.gpalew));
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printf("gpaleoff is 0x%x\n", val(mmcr, gpctl.gpaleoff));
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printf("\n");
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printf("piopfs15_0 is 0x%x\n", val(mmcr, pio.pfs15_0));
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printf("piopfs31_16 is 0x%x\n", val(mmcr, pio.pfs31_16));
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printf("cspfs is 0x%x\n", val(mmcr, pio.cspfs));
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printf("clksel is 0x%x\n", val(mmcr, pio.clksel));
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printf("dsctl is 0x%x\n", val(mmcr, pio.dsctl));
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printf("piodir15_0 is 0x%x\n", val(mmcr, pio.dir15_0));
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printf("piodir31_16 is 0x%x\n", val(mmcr, pio.dir31_16));
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printf("piodata15_0 is 0x%x\n", val(mmcr, pio.data15_0));
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printf("piodata31_16 is 0x%x\n", val(mmcr, pio.data31_16));
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printf("pioset15_0 is 0x%x\n", val(mmcr, pio.set15_0));
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printf("pioset31_16 is 0x%x\n", val(mmcr, pio.set31_16));
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printf("pioclr15_0 is 0x%x\n", val(mmcr, pio.clr15_0));
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printf("pioclr31_16 is 0x%x\n", val(mmcr, pio.clr31_16));
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printf("swtmrmilli is 0x%x\n", val(mmcr, swtmr.swtmrmilli));
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printf("swtmrmicro is 0x%x\n", val(mmcr, swtmr.swtmrmicro));
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printf("swtmrcfg is 0x%x\n", val(mmcr, swtmr.swtmrcfg));
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printf("status is 0x%x\n", val(mmcr, gptimers.status));
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printf("pad is 0x%x\n", val(mmcr, gptimers.pad));
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printf("timers[0].ctl is 0x%x\n", val(mmcr, gptimers.timer[0].ctl));
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printf("timers[0].cnt is 0x%x\n", val(mmcr, gptimers.timer[0].cnt));
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printf("timers[0].maxcmpa is 0x%x\n", val(mmcr, gptimers.timer[0].maxcmpa));
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printf("timers[0].maxcmpb is 0x%x\n", val(mmcr, gptimers.timer[0].maxcmpb));
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printf("timers[1].ctl is 0x%x\n", val(mmcr, gptimers.timer[1].ctl));
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printf("timers[1].cnt is 0x%x\n", val(mmcr, gptimers.timer[1].cnt));
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printf("timers[1].maxcmpa is 0x%x\n", val(mmcr, gptimers.timer[1].maxcmpa));
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printf("timers[1].maxcmpb is 0x%x\n", val(mmcr, gptimers.timer[1].maxcmpb));
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printf("timers[2].ctl is 0x%x\n", val(mmcr, gptimers.ctl2));
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printf("timers[2].cnt is 0x%x\n", val(mmcr, gptimers.cnt2));
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printf("timers[2].maxcmpa is 0x%x\n", val(mmcr, gptimers.maxcmpa2));
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printf("ctl is 0x%x\n", val(mmcr, watchdog.ctl));
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printf("cntll is 0x%x\n", val(mmcr, watchdog.cntll));
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printf("cntlh is 0x%x\n", val(mmcr, watchdog.cntlh));
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printf("uart 1 ctl is 0x%x\n", val(mmcr, uarts.uart[0].ctl));
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printf("uart 1 sta is 0x%x\n", val(mmcr, uarts.uart[0].sta));
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printf("uart 1 fcrshad is 0x%x\n", val(mmcr, uarts.uart[0].fcrshad));
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printf("uart 2 ctl is 0x%x\n", val(mmcr, uarts.uart[1].ctl));
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printf("uart 2 sta is 0x%x\n", val(mmcr, uarts.uart[1].sta));
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printf("uart 2 fcrshad is 0x%x\n", val(mmcr, uarts.uart[1].fcrshad));
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printf("ssi ctl is 0x%x\n", val(mmcr, ssi.ctl));
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printf("ssi xmit is 0x%x\n", val(mmcr, ssi.xmit));
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printf("ssi cmd is 0x%x\n", val(mmcr, ssi.cmd));
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printf("ssi sta is 0x%x\n", val(mmcr, ssi.sta));
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printf("ssi rcv is 0x%x\n", val(mmcr, ssi.rcv));
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printf("pcicr is 0x%x\n", val(mmcr, pic.pcicr));
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printf("mpicmode is 0x%x\n", val(mmcr, pic.mpicmode));
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printf("sl1picmode is 0x%x\n", val(mmcr, pic.sl1picmode));
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printf("sl2picmode is 0x%x\n", val(mmcr, pic.sl2picmode));
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printf("swint16_1 is 0x%x\n", val(mmcr, pic.swint16_1));
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printf("swint22_17 is 0x%x\n", val(mmcr, pic.swint22_17));
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printf("intpinpol is 0x%x\n", val(mmcr, pic.intpinpol));
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printf("pichostmap is 0x%x\n", val(mmcr, pic.pichostmap));
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printf("eccmap is 0x%x\n", val(mmcr, pic.eccmap));
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printf("gptmr0map is 0x%x\n", val(mmcr, pic.gptmr0map));
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printf("gptmr1map is 0x%x\n", val(mmcr, pic.gptmr1map));
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printf("gptmr2map is 0x%x\n", val(mmcr, pic.gptmr2map));
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printf("pit0map is 0x%x\n", val(mmcr, pic.pit0map));
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printf("pit1map is 0x%x\n", val(mmcr, pic.pit1map));
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printf("pit2map is 0x%x\n", val(mmcr, pic.pit2map));
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printf("uart1map is 0x%x\n", val(mmcr, pic.uart1map));
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printf("uart2map is 0x%x\n", val(mmcr, pic.uart2map));
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printf("pciintamap is 0x%x\n", val(mmcr, pic.pciintamap));
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printf("pciintbmap is 0x%x\n", val(mmcr, pic.pciintbmap));
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printf("pciintcmap is 0x%x\n", val(mmcr, pic.pciintcmap));
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printf("pciintdmap is 0x%x\n", val(mmcr, pic.pciintdmap));
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printf("dmabcintmap is 0x%x\n", val(mmcr, pic.dmabcintmap));
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printf("ssimap is 0x%x\n", val(mmcr, pic.ssimap));
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printf("wdtmap is 0x%x\n", val(mmcr, pic.wdtmap));
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printf("rtcmap is 0x%x\n", val(mmcr, pic.rtcmap));
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printf("wpvmap is 0x%x\n", val(mmcr, pic.wpvmap));
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printf("icemap is 0x%x\n", val(mmcr, pic.icemap));
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printf("ferrmap is 0x%x\n", val(mmcr, pic.ferrmap));
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printf("gp0imap is 0x%x\n", val(mmcr, pic.gp0imap));
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printf("gp1imap is 0x%x\n", val(mmcr, pic.gp1imap));
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printf("gp2imap is 0x%x\n", val(mmcr, pic.gp2imap));
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printf("gp3imap is 0x%x\n", val(mmcr, pic.gp3imap));
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printf("gp4imap is 0x%x\n", val(mmcr, pic.gp4imap));
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printf("gp5imap is 0x%x\n", val(mmcr, pic.gp5imap));
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printf("gp6imap is 0x%x\n", val(mmcr, pic.gp6imap));
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printf("gp7imap is 0x%x\n", val(mmcr, pic.gp7imap));
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printf("gp8imap is 0x%x\n", val(mmcr, pic.gp8imap));
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printf("gp9imap is 0x%x\n", val(mmcr, pic.gp9imap));
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printf("gp10imap is 0x%x\n", val(mmcr, pic.gp10imap));
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printf("sysinfo is 0x%x\n", val(mmcr, reset.sysinfo));
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printf("rescfg is 0x%x\n", val(mmcr, reset.rescfg));
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printf("ressta is 0x%x\n", val(mmcr, reset.ressta));
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printf("ctl is 0x%x\n", val(mmcr, dmacontrol.ctl));
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printf("mmio is 0x%x\n", val(mmcr, dmacontrol.mmio));
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printf("extchanmapa is 0x%x\n", val(mmcr, dmacontrol.extchanmapa));
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printf("extchanmapb is 0x%x\n", val(mmcr, dmacontrol.extchanmapb));
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printf("extpg0 is 0x%x\n", val(mmcr, dmacontrol.extpg0));
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printf("extpg1 is 0x%x\n", val(mmcr, dmacontrol.extpg1));
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printf("extpg2 is 0x%x\n", val(mmcr, dmacontrol.extpg2));
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printf("extpg3 is 0x%x\n", val(mmcr, dmacontrol.extpg3));
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printf("extpg5 is 0x%x\n", val(mmcr, dmacontrol.extpg5));
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printf("extpg6 is 0x%x\n", val(mmcr, dmacontrol.extpg6));
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printf("extpg7 is 0x%x\n", val(mmcr, dmacontrol.extpg7));
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printf("exttc3 is 0x%x\n", val(mmcr, dmacontrol.exttc3));
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printf("exttc5 is 0x%x\n", val(mmcr, dmacontrol.exttc5));
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printf("exttc6 is 0x%x\n", val(mmcr, dmacontrol.exttc6));
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printf("exttc7 is 0x%x\n", val(mmcr, dmacontrol.exttc7));
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printf("bcctl is 0x%x\n", val(mmcr, dmacontrol.bcctl));
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printf("bcsta is 0x%x\n", val(mmcr, dmacontrol.bcsta));
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printf("bsintenb is 0x%x\n", val(mmcr, dmacontrol.bsintenb));
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printf("bcval is 0x%x\n", val(mmcr, dmacontrol.bcval));
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printf("nxtaddl3 is 0x%x\n", val(mmcr, dmacontrol.nxtaddl3));
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printf("nxtaddh3 is 0x%x\n", val(mmcr, dmacontrol.nxtaddh3));
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printf("nxtaddl5 is 0x%x\n", val(mmcr, dmacontrol.nxtaddl5));
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printf("nxtaddh5 is 0x%x\n", val(mmcr, dmacontrol.nxtaddh5));
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printf("nxtaddl6 is 0x%x\n", val(mmcr, dmacontrol.nxtaddl6));
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printf("nxtaddh6 is 0x%x\n", val(mmcr, dmacontrol.nxtaddh6));
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printf("nxtaddl7 is 0x%x\n", val(mmcr, dmacontrol.nxtaddl7));
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printf("nxtaddh7 is 0x%x\n", val(mmcr, dmacontrol.nxtaddh7));
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printf("nxtttcl3 is 0x%x\n", val(mmcr, dmacontrol.nxtttcl3));
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printf("nxtttch3 is 0x%x\n", val(mmcr, dmacontrol.nxtttch3));
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printf("nxtttcl5 is 0x%x\n", val(mmcr, dmacontrol.nxtttcl5));
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printf("nxtttch5 is 0x%x\n", val(mmcr, dmacontrol.nxtttch5));
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printf("nxtttcl6 is 0x%x\n", val(mmcr, dmacontrol.nxtttcl6));
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printf("nxtttch6 is 0x%x\n", val(mmcr, dmacontrol.nxtttch6));
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printf("nxtttcl7 is 0x%x\n", val(mmcr, dmacontrol.nxtttcl7));
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printf("nxtttch7 is 0x%x\n", val(mmcr, dmacontrol.nxtttch7));
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return 0;
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}
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int map_mmcr(void)
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{
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int fd_mem;
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volatile uint8_t *mmcr;
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unsigned long size=4096;
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if ((fd_mem = open("/dev/mem", O_RDWR)) < 0) {
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perror("Can not open /dev/mem");
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exit(1);
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}
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if (getpagesize() > size) {
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size = getpagesize();
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}
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mmcr = mmap(0, size, PROT_WRITE | PROT_READ, MAP_SHARED,
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fd_mem, (off_t) (0xFFFEF000));
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if (mmcr == MAP_FAILED) {
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perror("Error MMAP /dev/mem");
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exit(1);
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}
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print_mmcr((struct mmcr *)mmcr);
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#if 0
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printf("ElanSC520 uC Rev. ID : %04x\n",*(uint16_t *)mmcr);
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printf("Am5x86 CPU Control : %04x\n",*(uint16_t *)(mmcr+2));
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printf("\n");
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printf("SDRAM Control : %04x\n",*(uint16_t *)(mmcr+0x10));
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printf("SDRAM Timing Control : %04x\n",*(uint16_t *)(mmcr+0x12));
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printf("SDRAM Bank Config : %04x\n",*(uint16_t *)(mmcr+0x14));
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printf("SDRAM Bank 0-3 Ending : %04x\n",*(uint16_t *)(mmcr+0x18));
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printf("ECC Control : %04x\n",*(uint16_t *)(mmcr+0x20));
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printf("ECC Status : %04x\n",*(uint16_t *)(mmcr+0x21));
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printf("ECC Check Bit Position: %04x\n",*(uint16_t *)(mmcr+0x22));
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printf("ECC Check Code Test : %04x\n",*(uint16_t *)(mmcr+0x23));
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printf("ECC Single Bit ErrAddr: %04x\n",*(uint16_t *)(mmcr+0x24));
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printf("ECC Multi Bit ErrAddr : %04x\n",*(uint16_t *)(mmcr+0x28));
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printf("\n");
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printf("SDRAM Buffer Control : %04x\n",*(uint16_t *)(mmcr+0x40));
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printf("\n");
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printf("BOOTCS Control : %04x\n",*(uint16_t *)(mmcr+0x50));
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printf("BOOTCS1 Control : %04x\n",*(uint16_t *)(mmcr+0x54));
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printf("BOOTCS2 Control : %04x\n",*(uint16_t *)(mmcr+0x56));
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printf("\n");
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printf("Adr Decode Control : %02x\n",*(uint8_t *)(mmcr+0x80));
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printf("WrProt Violation Stat.: %04x\n",*(uint16_t *)(mmcr+0x82));
|
||||
printf("PAR 0 : %08x\n",*(uint32_t *)(mmcr+0x88));
|
||||
printf("PAR 1 : %08x\n",*(uint32_t *)(mmcr+0x8C));
|
||||
printf("PAR 2 : %08x\n",*(uint32_t *)(mmcr+0x90));
|
||||
printf("PAR 3 : %08x\n",*(uint32_t *)(mmcr+0x94));
|
||||
printf("PAR 4 : %08x\n",*(uint32_t *)(mmcr+0x98));
|
||||
printf("PAR 5 : %08x\n",*(uint32_t *)(mmcr+0x9C));
|
||||
printf("PAR 6 : %08x\n",*(uint32_t *)(mmcr+0xA0));
|
||||
printf("PAR 7 : %08x\n",*(uint32_t *)(mmcr+0xA4));
|
||||
printf("PAR 8 : %08x\n",*(uint32_t *)(mmcr+0xA8));
|
||||
printf("PAR 9 : %08x\n",*(uint32_t *)(mmcr+0xAC));
|
||||
printf("PAR 10 : %08x\n",*(uint32_t *)(mmcr+0xB0));
|
||||
printf("PAR 11 : %08x\n",*(uint32_t *)(mmcr+0xB4));
|
||||
printf("PAR 12 : %08x\n",*(uint32_t *)(mmcr+0xB8));
|
||||
printf("PAR 13 : %08x\n",*(uint32_t *)(mmcr+0xBC));
|
||||
printf("PAR 14 : %08x\n",*(uint32_t *)(mmcr+0xC0));
|
||||
printf("PAR 15 : %08x\n",*(uint32_t *)(mmcr+0xC4));
|
||||
#endif
|
||||
munmap((void *) mmcr, size);
|
||||
return 0;
|
||||
}
|
||||
|
||||
int main(int argc, char *argv[])
|
||||
{
|
||||
map_mmcr();
|
||||
return 0;
|
||||
}
|
||||
Loading…
Reference in New Issue