mb/google/skyrim: Pass Ti50 IRQ to PSP

It shouldn't be assumed that all variants of skyrim will use the same
gpio for TPM interrupts.

Use the PSP's new mailbox command to tell it what gpio the tpm interrupt
comes in on.

BUG=b:248193764
TEST=tast run <ip> hwsec.TPMContest
     Verify log entry:[DEBUG]  PSP: Setting TPM GPIO to 18...OK
     Use incorrect GPIO in mailbox cmd and verify TPMContest test
     failed.

Signed-off-by: Mark Hasemeyer <markhas@google.com>
Change-Id: I9f4005e10987caf9f32e5ac99ff5f2b9467e586c
Reviewed-on: https://review.coreboot.org/c/coreboot/+/69874
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

src/mainboard/google/skyrim/mainboard.c

@@ -2,9 +2,11 @@
 
 #include <amdblocks/acpimmio.h>
 #include <amdblocks/amd_pci_util.h>
+#include <amdblocks/psp.h>
 #include <baseboard/variants.h>
 #include <console/console.h>
 #include <device/device.h>
+#include <drivers/i2c/tpm/chip.h>
 #include <soc/acpi.h>
 #include <variant/ec.h>
 
@@ -69,10 +71,19 @@ static void mainboard_configure_gpios(void)
 				override_gpios, override_num_gpios);
 }
 
+static void configure_psp_tpm_gpio(void)
+{
+	const struct device *ti50_dev = DEV_PTR(ti50);
+	struct drivers_i2c_tpm_config *cfg = config_of(ti50_dev);
+
+	psp_set_tpm_irq_gpio(cfg->irq_gpio.pins[0]);
+}
+
 static void mainboard_init(void *chip_info)
 {
 	mainboard_configure_gpios();
 	mainboard_ec_init();
+	configure_psp_tpm_gpio();
 }
 
 static void mainboard_enable(struct device *dev)

src/mainboard/google/skyrim/variants/baseboard/devicetree.cb

@@ -182,7 +182,7 @@ chip soc/amd/mendocino
 			register "hid" = ""GOOG0005""
 			register "desc" = ""Ti50 TPM""
 			register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_LOW(GPIO_18)"
-			device i2c 50 on end
+			device i2c 50 alias ti50 on end
 		end
 	end