From 7da871ef497e66cd62d4d8bea142cd438bef204b Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ky=C3=B6sti=20M=C3=A4lkki?= Date: Sun, 20 Jun 2021 14:58:36 +0300 Subject: [PATCH] cpu/x86/lapic: Do not set read-only bits in LVTx MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The bits REMOTE_IRR and SEND_PENDING are documented as read-only, and reserved bits should not be modified either. Change-Id: I6bcb9eb990debe169340a0bfe662158b62a8f4dc Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/c/coreboot/+/55700 Tested-by: build bot (Jenkins) Reviewed-by: Nico Huber Reviewed-by: Angel Pons --- src/cpu/x86/lapic/lapic.c | 10 +++------- 1 file changed, 3 insertions(+), 7 deletions(-) diff --git a/src/cpu/x86/lapic/lapic.c b/src/cpu/x86/lapic/lapic.c index a346bc1b14..58e45248ab 100644 --- a/src/cpu/x86/lapic/lapic.c +++ b/src/cpu/x86/lapic/lapic.c @@ -52,16 +52,12 @@ static void lapic_virtual_wire_mode_init(void) lapic_update32(LAPIC_SPIV, ~LAPIC_VECTOR_MASK, LAPIC_SPIV_ENABLE); /* Put the local APIC in virtual wire mode */ - uint32_t mask = LAPIC_LVT_MASKED | LAPIC_LVT_LEVEL_TRIGGER | LAPIC_LVT_REMOTE_IRR | - LAPIC_INPUT_POLARITY | LAPIC_SEND_PENDING | LAPIC_LVT_RESERVED_1 | + uint32_t mask = LAPIC_LVT_MASKED | LAPIC_LVT_LEVEL_TRIGGER | LAPIC_INPUT_POLARITY | LAPIC_DELIVERY_MODE_MASK; - lapic_update32(LAPIC_LVT0, ~mask, LAPIC_LVT_REMOTE_IRR | LAPIC_SEND_PENDING | - LAPIC_DELIVERY_MODE_EXTINT); - - lapic_update32(LAPIC_LVT1, ~mask, LAPIC_LVT_REMOTE_IRR | LAPIC_SEND_PENDING | - LAPIC_DELIVERY_MODE_NMI); + lapic_update32(LAPIC_LVT0, ~mask, LAPIC_DELIVERY_MODE_EXTINT); + lapic_update32(LAPIC_LVT1, ~mask, LAPIC_DELIVERY_MODE_NMI); } void setup_lapic(void)