GNUBoot/coreboot-kgpe-d16
2
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity

intel: auto include intel/common/firmware

Browse source 
Instead of selecting the Kconfig option and adding the subdir
entry within each chipset auto include the common/firmware
directory as it's guarded by HAVE_INTEL_FIRMWARE.

BUG=chrome-os-partner:43462
BRANCH=None
TEST=Built glados.

Change-Id: I166db67c41b16c4d9f0116abce00940514539fa5
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/11734
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
This commit is contained in:
Aaron Durbin 2015-07-30 16:50:21 -05:00
parent 321402bfce
commit 7dcb545ee2
10 changed files with 3 additions and 14 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

1
src/soc/intel/baytrail/Makefile.inc
View file

@ -8,7 +8,6 @@ subdirs-y += ../../../cpu/x86/smm
subdirs-y += ../../../cpu/x86/tsc
subdirs-y += ../../../cpu/intel/microcode
subdirs-y += ../../../cpu/intel/turbo
subdirs-y += ../../../southbridge/intel/common/firmware
ramstage-y += memmap.c
romstage-y += memmap.c

1
src/soc/intel/braswell/Makefile.inc
View file

@ -8,7 +8,6 @@ subdirs-y += ../../../cpu/x86/smm
subdirs-y += ../../../cpu/x86/tsc
subdirs-y += ../../../cpu/intel/microcode
subdirs-y += ../../../cpu/intel/turbo
subdirs-y += ../../../southbridge/intel/common/firmware
romstage-y += gpio_support.c
romstage-y += iosf.c

1
src/soc/intel/broadwell/Makefile.inc
View file

@ -8,7 +8,6 @@ subdirs-y += ../../../cpu/x86/smm
subdirs-y += ../../../cpu/x86/tsc
subdirs-y += ../../../cpu/intel/microcode
subdirs-y += ../../../cpu/intel/turbo
subdirs-y += ../../../southbridge/intel/common/firmware
ramstage-y += acpi.c
ramstage-y += adsp.c

1
src/soc/intel/fsp_baytrail/Makefile.inc
View file

@ -30,7 +30,6 @@ subdirs-y += ../../../cpu/x86/cache
subdirs-y += ../../../cpu/intel/turbo
subdirs-y += ../../../lib/fsp
subdirs-y += fsp
subdirs-y += ../../../southbridge/intel/common/firmware
ramstage-y += memmap.c
romstage-y += memmap.c

2
src/southbridge/intel/bd82x6x/Makefile.inc
View file

@ -19,8 +19,6 @@
ifeq ($(CONFIG_SOUTHBRIDGE_INTEL_C216)$(CONFIG_SOUTHBRIDGE_INTEL_BD82X6X),y)
subdirs-y += ../common/firmware
ramstage-y += pch.c
ramstage-y += azalia.c
ramstage-y += lpc.c

3
src/southbridge/intel/common/Makefile.inc
View file

@ -17,6 +17,9 @@
## Foundation, Inc.
##
# CONFIG_HAVE_INTEL_FIRMWARE protects doing anything to the build.
subdirs-y += firmware
ifeq ($(CONFIG_SOUTHBRIDGE_INTEL_COMMON),y)
romstage-$(CONFIG_USBDEBUG_IN_ROMSTAGE) += usb_debug.c

2
src/southbridge/intel/fsp_bd82x6x/Makefile.inc
View file

@ -20,8 +20,6 @@
ifeq ($(CONFIG_SOUTHBRIDGE_INTEL_FSP_BD82X6X),y)
subdirs-y += ../common/firmware
ramstage-y += pch.c
ramstage-y += azalia.c
ramstage-y += lpc.c

2
src/southbridge/intel/fsp_rangeley/Makefile.inc
View file

@ -20,8 +20,6 @@
ifeq ($(CONFIG_SOUTHBRIDGE_INTEL_FSP_RANGELEY),y)
subdirs-y += ../common/firmware
ramstage-y += soc.c
ramstage-y += lpc.c
ramstage-y += sata.c

2
src/southbridge/intel/ibexpeak/Makefile.inc
View file

@ -19,8 +19,6 @@
ifeq ($(CONFIG_SOUTHBRIDGE_INTEL_IBEXPEAK),y)
subdirs-y += ../common/firmware
ramstage-y += ../bd82x6x/pch.c
ramstage-y += azalia.c
ramstage-y += lpc.c

2
src/southbridge/intel/lynxpoint/Makefile.inc
View file

@ -19,8 +19,6 @@
ifeq ($(CONFIG_SOUTHBRIDGE_INTEL_LYNXPOINT),y)
subdirs-y += ../common/firmware
ramstage-y += pch.c
ramstage-y += azalia.c
ramstage-y += lpc.c