soc/cavium/cn81xx/spi: Add function to return SPI clock

Change-Id: I07c95b9ea14d47da0497470487fa3f162f8012c8
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/28789
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>

src/soc/cavium/cn81xx/include/soc/spi.h

@@ -29,6 +29,7 @@ void spi_set_clock(const size_t bus,
 		   const size_t speed_hz,
 		   const size_t idle_low,
 		   const size_t idle_cycles);
+uint64_t spi_get_clock(const size_t bus);
 void spi_set_lsbmsb(const size_t bus, const size_t lsb_first);
 void spi_init_custom(const size_t bus,
 		     const size_t speed_hz,

src/soc/cavium/cn81xx/spi.c

@@ -217,6 +217,27 @@ void spi_set_clock(const size_t bus,
 	       (sclk / (2ULL * cfg.s.clkdiv)) >> 10);
 }
 
+/**
+ * Get current SPI clock frequency in Hz.
+ *
+ * @param bus                 The SPI bus to operate on
+ */
+uint64_t spi_get_clock(const size_t bus)
+{
+	union cavium_spi_cfg cfg;
+
+	assert(bus < ARRAY_SIZE(cavium_spi_slaves));
+	if (bus >= ARRAY_SIZE(cavium_spi_slaves))
+		return 0;
+
+	struct cavium_spi *regs = cavium_spi_slaves[bus].regs;
+	const uint64_t sclk = thunderx_get_io_clock();
+
+	cfg.u = read64(&regs->cfg);
+
+	return (sclk / (2ULL * cfg.s.clkdiv));
+}
+
 /**
  * Set SPI LSB/MSB first.
  *