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mb/google/corsola: Fix PS8640 power-on T6 sequence 

The T6 of PS8640 power on sequence should be larger than 0ms, but it's
-0.062ms now. Add 100us delay between VRF12 and VCN33. The PS8640
power-on sequence is described in the "PS8640_DS_V1.4_20200210.docx".

BUG=b:235448279
BRANCH=None
TEST=The sequence T6 is larger than 0ms when power on.

Signed-off-by: Ruihai Zhou <zhouruihai@huaqin.corp-partner.google.com>
Change-Id: I0b8a37d6119dc027a9d1c0a62c087b0a7ef14cac
Reviewed-on: https://review.coreboot.org/c/coreboot/+/65084
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: zanxi chen <chenzanxi@huaqin.corp-partner.google.com>
Reviewed-by: Bo-Chen Chen <rex-bc.chen@mediatek.com>
Reviewed-by: Yidi Lin <yidilin@chromium.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
This commit is contained in:
Ruihai Zhou 2022-06-10 15:27:33 +08:00 committed by Martin L Roth
parent a49460c6b6
commit 7df7d8dd4b
1 changed files with 2 additions and 0 deletions
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src/mainboard/google/corsola/display.c
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@ -22,6 +22,7 @@ static void bridge_ps8640_power_on(void)
/*
* PS8640 power-on sequence is described in chapter 14, PS8640_DS_V1.4_20200210.docx
* - set VDD12 to be 1.2V
* - delay 100us
* - set VDD33 to be 3.3V
* - pull hign PD#
* - pull down RST#
@ -35,6 +36,7 @@ static void bridge_ps8640_power_on(void)
/* Set VRF12 to 1.2V and VCN33 to 3.3V */
mainboard_set_regulator_vol(MTK_REGULATOR_VRF12, 1200000);
udelay(100);
mainboard_set_regulator_vol(MTK_REGULATOR_VCN33, 3300000);
udelay(200);