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mb/system76/lemp9: Add SMBIOS descriptions to root ports 

Change-Id: Ie663d424edbbeeb8f5691b00f3977f7501e9ab45
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45110
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Michael Niewöhner
This commit is contained in:
Felix Singer 2020-09-04 10:23:50 +00:00 committed by Michael Niewöhner
parent be50ab0878
commit 7e396f380e
1 changed files with 6 additions and 3 deletions
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9
src/mainboard/system76/lemp9/devicetree.cb
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@ -175,7 +175,7 @@ chip soc/intel/cannonlake
end end
device pci 1c.6 off end # PCI Express Port 7 device pci 1c.6 off end # PCI Express Port 7
device pci 1c.7 on # PCI Express Port 8 device pci 1c.7 on # PCI Express Port 8
device pci 00.0 on end # x1 M.2/E 2230 (WLAN) device pci 00.0 on end # x1 M.2/E 2230 (J_WLAN1)
register "PcieRpEnable[7]" = "1" register "PcieRpEnable[7]" = "1"
register "PcieRpLtrEnable[7]" = "1" register "PcieRpLtrEnable[7]" = "1"
register "PcieClkSrcUsage[2]" = "7" register "PcieClkSrcUsage[2]" = "7"
@ -184,25 +184,28 @@ chip soc/intel/cannonlake
chip drivers/intel/wifi chip drivers/intel/wifi
device pci 00.0 on end device pci 00.0 on end
end end
smbios_slot_desc "SlotTypeM2Socket1_SD" "SlotLengthOther" "M.2/E 2230 (J_WLAN1)" "SlotDataBusWidth1X"
end end
device pci 1d.0 on # PCI Express Port 9 device pci 1d.0 on # PCI Express Port 9
device pci 00.0 on end # x4 M.2/M 2280 (Slot 2) device pci 00.0 on end # x4 M.2/M 2280 (J_SSD2)
register "PcieRpEnable[8]" = "1" register "PcieRpEnable[8]" = "1"
register "PcieRpLtrEnable[8]" = "1" register "PcieRpLtrEnable[8]" = "1"
register "PcieClkSrcUsage[4]" = "8" register "PcieClkSrcUsage[4]" = "8"
register "PcieClkSrcClkReq[4]" = "4" register "PcieClkSrcClkReq[4]" = "4"
register "PcieRpSlotImplemented[8]" = "1" register "PcieRpSlotImplemented[8]" = "1"
smbios_slot_desc "SlotTypeM2Socket3" "SlotLengthOther" "M.2/M 2280 (J_SSD2)" "SlotDataBusWidth4X"
end end
device pci 1d.1 off end # PCI Express Port 10 device pci 1d.1 off end # PCI Express Port 10
device pci 1d.2 off end # PCI Express Port 11 device pci 1d.2 off end # PCI Express Port 11
device pci 1d.3 off end # PCI Express Port 12 device pci 1d.3 off end # PCI Express Port 12
device pci 1d.4 on # PCI Express Port 13 device pci 1d.4 on # PCI Express Port 13
device pci 00.0 on end # x4 M.2/M 2280 (Slot 1) device pci 00.0 on end # x4 M.2/M 2280 (J_SSD1)
register "PcieRpEnable[12]" = "1" register "PcieRpEnable[12]" = "1"
register "PcieRpLtrEnable[12]" = "1" register "PcieRpLtrEnable[12]" = "1"
register "PcieClkSrcUsage[5]" = "12" register "PcieClkSrcUsage[5]" = "12"
register "PcieClkSrcClkReq[5]" = "5" register "PcieClkSrcClkReq[5]" = "5"
register "PcieRpSlotImplemented[12]" = "1" register "PcieRpSlotImplemented[12]" = "1"
smbios_slot_desc "SlotTypeM2Socket3" "SlotLengthOther" "M.2/M 2280 (J_SSD1)" "SlotDataBusWidth4X"
end end
device pci 1d.5 off end # PCI Express Port 14 device pci 1d.5 off end # PCI Express Port 14
device pci 1d.6 off end # PCI Express Port 15 device pci 1d.6 off end # PCI Express Port 15