sb/intel/i82801i/jx/chip.h: Use unsigned ints for bitfields
Clang complains about this. Change-Id: I3d6c333bb884ebc0ae50c4437f2cd98e74cf7379 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/63024 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Elyes Haouas <ehaouas@noos.fr>
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@ -55,17 +55,17 @@ struct southbridge_intel_i82801ix_config {
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/* IDE configuration */
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/* IDE configuration */
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uint8_t sata_port_map : 6;
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uint8_t sata_port_map : 6;
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int sata_clock_request : 1;
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unsigned int sata_clock_request : 1;
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int sata_traffic_monitor : 1;
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unsigned int sata_traffic_monitor : 1;
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int c4onc3_enable:1;
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unsigned int c4onc3_enable:1;
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int c5_enable : 1;
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unsigned int c5_enable : 1;
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int c6_enable : 1;
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unsigned int c6_enable : 1;
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int throttle_duty : 3;
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unsigned int throttle_duty : 3;
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/* Bit mask to tell whether a PCIe slot is implemented as slot. */
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/* Bit mask to tell whether a PCIe slot is implemented as slot. */
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int pcie_slot_implemented : 6;
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unsigned int pcie_slot_implemented : 6;
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/* Power limits for PCIe ports. Values are in 10^(-scale) watts. */
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/* Power limits for PCIe ports. Values are in 10^(-scale) watts. */
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struct {
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struct {
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@ -42,16 +42,16 @@ struct southbridge_intel_i82801jx_config {
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/* IDE configuration */
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/* IDE configuration */
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uint8_t sata_port_map : 6;
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uint8_t sata_port_map : 6;
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int sata_clock_request : 1;
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unsigned int sata_clock_request : 1;
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int c4onc3_enable:1;
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unsigned int c4onc3_enable:1;
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int c5_enable : 1;
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unsigned int c5_enable : 1;
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int c6_enable : 1;
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unsigned int c6_enable : 1;
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int throttle_duty : 3;
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unsigned int throttle_duty : 3;
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/* Bit mask to tell whether a PCIe slot is implemented as slot. */
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/* Bit mask to tell whether a PCIe slot is implemented as slot. */
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int pcie_slot_implemented : 6;
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unsigned int pcie_slot_implemented : 6;
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/* Power limits for PCIe ports. Values are in 10^(-scale) watts. */
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/* Power limits for PCIe ports. Values are in 10^(-scale) watts. */
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struct {
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struct {
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