samus: Update indices of ramstage and refcode blobs

This must be committed at the same time as the corresponding
depthcharge change which updates the fmap.

BUG=chrome-os-partner:30079
BRANCH=none
TEST=Build samus firmware.
     dump_fmap -h /build/samus/firmware/image.bin shows PD_MAIN_A and
       PD_MAIN_B sections.
     Boot samus.  'crossystem mainfw_act' -> A
     As root, 'crossystem fwb_tries=1'
     Reboot samus.  'crossystem mainfw_act' -> B
CQ-DEPEND=CL:208984,CL:*169850,CL:208989

Original-Change-Id: Ibccec8b82ba22c61248a79023f42b92e4763403e
Original-Signed-off-by: Randall Spangler <rspangler@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/208899
Original-Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
(cherry picked from commit d241e1dddaf8a435e49e08e60e4ad998735d2137)
Signed-off-by: Marc Jones <marc.jones@se-eng.com>

Change-Id: Ida8f7bd68d71e2a4a47e304b8f8283b566c52837
Reviewed-on: http://review.coreboot.org/8219
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Tested-by: build bot (Jenkins)
This commit is contained in:
Randall Spangler 2014-07-18 12:45:08 -07:00 committed by Marc Jones
parent 808a254c3f
commit 7e72abef1b
1 changed files with 2 additions and 2 deletions

View File

@ -20,11 +20,11 @@ config BOARD_SPECIFIC_OPTIONS # dummy
config VBOOT_RAMSTAGE_INDEX
hex
default 0x2
default 0x3
config VBOOT_REFCODE_INDEX
hex
default 0x3
default 0x4
config MAINBOARD_DIR
string