mb/google/dedede/variants/drawcia: update PL1 max and min power values

Update PL1 max and min power values

BUG=None
BRANCH=None
TEST=build and verify on dralat system

Change-Id: I75d47fa721576564f71fbd5d5fd2e820fc3f1925
Signed-off-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46502
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
This commit is contained in:
Sumeet R Pawnikar 2020-10-16 20:56:53 +05:30 committed by Patrick Georgi
parent a45f8959c0
commit 7ea4372d82
1 changed files with 2 additions and 2 deletions

View File

@ -93,8 +93,8 @@ chip soc/intel/jasperlake
register "controls.power_limits" = "{
.pl1 = {
.min_power = 4800,
.max_power = 6000,
.min_power = 3800,
.max_power = 5800,
.time_window_min = 1 * MSECS_PER_SEC,
.time_window_max = 1 * MSECS_PER_SEC,
.granularity = 200,