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Always enable parent resources before child resources.

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Always initialize parents before children.

Move s2881 code into a driver.

Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Peter Stuge <peter@stuge.se>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5633 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Myles Watson 2010-06-17 16:16:56 +00:00
parent e10757ed52
commit 7eac4450b3
54 changed files with 267 additions and 418 deletions
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2
src/devices/cardbus_device.c
View file

@ -170,8 +170,6 @@ void cardbus_enable_resources(device_t dev)
pci_write_config16(dev, PCI_BRIDGE_CONTROL, ctrl);
pci_dev_enable_resources(dev);
enable_childrens_resources(dev);
}
struct device_operations default_cardbus_ops_bus = {

107
src/devices/device.c
View file

@ -782,33 +782,34 @@ void assign_resources(struct bus *bus)
}
/**
* @brief Enable the resources for a specific device
* @brief Enable the resources for devices on a link
*
* @param dev the device whose resources are to be enabled
* @param link the link whose devices' resources are to be enabled
*
* Enable resources of the device by calling the device specific
* enable_resources() method.
*
* The parent's resources should be enabled first to avoid having enabling
* order problem. This is done by calling the parent's enable_resources()
* method and let that method to call it's children's enable_resoruces()
* method via the (global) enable_childrens_resources().
* method before its childrens' enable_resources() methods.
*
* Indirect mutual recursion:
* enable_resources() -> device_operations::enable_resource()
* device_operations::enable_resource() -> enable_children_resources()
* enable_children_resources() -> enable_resources()
*/
void enable_resources(struct device *dev)
static void enable_resources(struct bus *link)
{
if (!dev->enabled) {
return;
struct device *dev;
struct bus *c_link;
for (dev = link->children; dev; dev = dev->sibling) {
if (dev->enabled && dev->ops && dev->ops->enable_resources) {
dev->ops->enable_resources(dev);
}
}
if (!dev->ops || !dev->ops->enable_resources) {
printk(BIOS_ERR, "%s missing enable_resources\n", dev_path(dev));
return;
for (dev = link->children; dev; dev = dev->sibling) {
for (c_link = dev->link_list; c_link; c_link = c_link->next) {
enable_resources(c_link);
}
}
dev->ops->enable_resources(dev);
}
/**
@ -1036,39 +1037,77 @@ void dev_configure(void)
*/
void dev_enable(void)
{
struct bus *link;
printk(BIOS_INFO, "Enabling resources...\n");
/* now enable everything. */
enable_resources(&dev_root);
for (link = dev_root.link_list; link; link = link->next)
enable_resources(link);
printk(BIOS_INFO, "done.\n");
}
/**
* @brief Initialize all devices in the global device list.
* @brief Initialize a specific device
*
* Starting at the first device on the global device link list,
* walk the list and call the device's init() method to do deivce
* specific setup.
* @param dev the device to be initialized
*
* The parent should be initialized first to avoid having an ordering
* problem. This is done by calling the parent's init()
* method before its childrens' init() methods.
*
*/
static void init_dev(struct device *dev)
{
if (!dev->enabled) {
return;
}
if (!dev->initialized && dev->ops && dev->ops->init) {
if (dev->path.type == DEVICE_PATH_I2C) {
printk(BIOS_DEBUG, "smbus: %s[%d]->",
dev_path(dev->bus->dev), dev->bus->link_num);
}
printk(BIOS_DEBUG, "%s init\n", dev_path(dev));
dev->initialized = 1;
dev->ops->init(dev);
}
}
static void init_link(struct bus *link)
{
struct device *dev;
struct bus *c_link;
for (dev = link->children; dev; dev = dev->sibling) {
init_dev(dev);
}
for (dev = link->children; dev; dev = dev->sibling) {
for (c_link = dev->link_list; c_link; c_link = c_link->next) {
init_link(c_link);
}
}
}
/**
* @brief Initialize all devices in the global device tree.
*
* Starting at the root device, call the device's init() method to do device-
* specific setup, then call each child's init() method.
*/
void dev_initialize(void)
{
struct device *dev;
struct bus *link;
printk(BIOS_INFO, "Initializing devices...\n");
for (dev = all_devices; dev; dev = dev->next) {
if (dev->enabled && !dev->initialized &&
dev->ops && dev->ops->init) {
if (dev->path.type == DEVICE_PATH_I2C) {
printk(BIOS_DEBUG, "smbus: %s[%d]->",
dev_path(dev->bus->dev),
dev->bus->link_num);
}
printk(BIOS_DEBUG, "%s init\n", dev_path(dev));
dev->initialized = 1;
dev->ops->init(dev);
}
}
/* now initialize everything. */
for (link = dev_root.link_list; link; link = link->next)
init_link(link);
printk(BIOS_INFO, "Devices initialized\n");
show_all_devs(BIOS_SPEW, "After init.");
}

1
src/devices/pci_device.c
View file

@ -621,7 +621,6 @@ void pci_bus_enable_resources(struct device *dev)
pci_write_config16(dev, PCI_BRIDGE_CONTROL, ctrl);
pci_dev_enable_resources(dev);
enable_childrens_resources(dev);
}
void pci_bus_reset(struct bus *bus)

37
src/devices/root_device.c
View file

@ -32,7 +32,7 @@
* that encompass the resources for the entire system.
* @param root Pointer to the device structure for the system root device
*/
void root_dev_read_resources(device_t root)
static void root_dev_read_resources(device_t root)
{
printk(BIOS_ERR, "%s should never be called.\n", __func__);
}
@ -44,7 +44,7 @@ void root_dev_read_resources(device_t root)
* and every device under it which are all of the devices.
* @param root Pointer to the device structure for the system root device
*/
void root_dev_set_resources(device_t root)
static void root_dev_set_resources(device_t root)
{
printk(BIOS_ERR, "%s should never be called.\n", __func__);
}
@ -115,33 +115,8 @@ unsigned int scan_static_bus(device_t bus, unsigned int max)
return max;
}
/**
* @brief Enable resources for children devices
*
* @param dev the device whos children's resources are to be enabled
*
* This function is called by the global enable_resource() indirectly via the
* device_operation::enable_resources() method of devices.
*
* Indirect mutual recursion:
* enable_childrens_resources() -> enable_resources()
* enable_resources() -> device_operation::enable_resources()
* device_operation::enable_resources() -> enable_children_resources()
*/
void enable_childrens_resources(device_t dev)
static void root_dev_enable_resources(device_t dev)
{
struct bus *link;
for(link = dev->link_list; link; link = link->next) {
device_t child;
for(child = link->children; child; child = child->sibling) {
enable_resources(child);
}
}
}
void root_dev_enable_resources(device_t dev)
{
enable_childrens_resources(dev);
}
/**
@ -152,16 +127,16 @@ void root_dev_enable_resources(device_t dev)
*
* This function is the default scan_bus() method of the root device.
*/
unsigned int root_dev_scan_bus(device_t root, unsigned int max)
static unsigned int root_dev_scan_bus(device_t root, unsigned int max)
{
return scan_static_bus(root, max);
}
void root_dev_init(device_t root)
static void root_dev_init(device_t root)
{
}
void root_dev_reset(struct bus *bus)
static void root_dev_reset(struct bus *bus)
{
printk(BIOS_INFO, "Reseting board...\n");
hard_reset();

122
src/drivers/i2c/adt7463/adt7463.c Normal file
View file

@ -0,0 +1,122 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2005 Tyan
* (Written by Yinghai Lu <yhlu@tyan.com> for Tyan)
* Copyright (C) 2007 Ward Vandewege <ward@gnu.org>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <device/device.h>
#include <console/console.h>
#include <device/smbus.h>
#include "chip.h"
/**
* Do some S2881-specific HWM initialization for the ADT7463 chip.
*
* Should be factored out so that it can be more general.
*
* See Analog Devices ADT7463 datasheet, Rev C (2004):
* http://www.analog.com/en/prod/0,,766_825_ADT7463,00.html
*/
static void adt7463_init(device_t dev)
{
device_t smbus_dev, adt7463;
struct device_path path;
int result;
/* Find the SMBus controller (AMD-8111). */
smbus_dev = dev_find_device(0x1022, 0x746b, 0);
if (!smbus_dev)
die("SMBus controller not found\n");
printk(BIOS_DEBUG, "SMBus controller found\n");
/* Find the ADT7463 device. */
path.type = DEVICE_PATH_I2C;
path.i2c.device = 0x2d;
adt7463 = find_dev_path(smbus_dev->link_list, &path);
if (!adt7463)
die("ADT7463 not found\n");
printk(BIOS_DEBUG, "ADT7463 found\n");
/* Set all fans to 'Fastest Speed Calculated by All 3 Temperature
* Channels Controls PWMx'.
*/
result = smbus_write_byte(adt7463, 0x5c, 0xc2);
result = smbus_write_byte(adt7463, 0x5d, 0xc2);
result = smbus_write_byte(adt7463, 0x5e, 0xc2);
/* Make sure that our fans never stop when temp. falls below Tmin,
* but rather keep going at minimum duty cycle (applies to automatic
* fan control mode only).
*/
result = smbus_write_byte(adt7463, 0x62, 0xc0);
/* Set minimum PWM duty cycle to 25%, rather than the default 50%. */
result = smbus_write_byte(adt7463, 0x64, 0x40);
result = smbus_write_byte(adt7463, 0x65, 0x40);
result = smbus_write_byte(adt7463, 0x66, 0x40);
/* Set Tmin to 55C, rather than the default 90C. Above this temperature
* the fans will start blowing harder as temperature increases
* (automatic mode only).
*/
result = smbus_write_byte(adt7463, 0x67, 0x37);
result = smbus_write_byte(adt7463, 0x68, 0x37);
result = smbus_write_byte(adt7463, 0x69, 0x37);
/* Set THERM limit to 70C, rather than the default 100C.
* The fans will kick in at 100% if the sensors reach this temperature,
* (only in automatic mode, but supposedly even when hardware is
* locked up). This is a failsafe measure.
*/
result = smbus_write_byte(adt7463, 0x6a, 0x46);
result = smbus_write_byte(adt7463, 0x6b, 0x46);
result = smbus_write_byte(adt7463, 0x6c, 0x46);
/* Remote temperature 1 offset (LSB == 0.25C). */
result = smbus_write_byte(adt7463, 0x70, 0x02);
/* Remote temperature 2 offset (LSB == 0.25C). */
result = smbus_write_byte(adt7463, 0x72, 0x01);
/* Set TACH measurements to normal (1/second). */
result = smbus_write_byte(adt7463, 0x78, 0xf0);
printk(BIOS_DEBUG, "ADT7463 properly initialized\n");
}
static void adt7463_noop(device_t dummy)
{
}
static struct device_operations adt7463_operations = {
.read_resources = adt7463_noop,
.set_resources = adt7463_noop,
.enable_resources = adt7463_noop,
.init = adt7463_init,
};
static void enable_dev(struct device *dev)
{
dev->ops = &adt7463_operations;
}
struct chip_operations mainboard_ops = {
CHIP_NAME("adt7463")
.enable_dev = enable_dev,
};

4
src/drivers/i2c/adt7463/chip.h Normal file
View file

@ -0,0 +1,4 @@
extern struct chip_operations drivers_i2c_adt7463_ops;
struct drivers_i2c_adt7463_config {
};

8
src/include/device/device.h
View file

@ -107,7 +107,6 @@ void dev_optimize(void);
int reset_bus(struct bus *bus);
unsigned int scan_bus(struct device *bus, unsigned int max);
void assign_resources(struct bus *bus);
void enable_resources(struct device *dev);
void enumerate_static_device(void);
void enumerate_static_devices(void);
const char *dev_path(device_t dev);
@ -146,12 +145,5 @@ void show_all_devs_resources(int debug_level, const char* msg);
extern struct device_operations default_dev_ops_root;
void pci_domain_read_resources(struct device *dev);
unsigned int pci_domain_scan_bus(struct device *dev, unsigned int max);
void root_dev_read_resources(device_t dev);
void root_dev_set_resources(device_t dev);
unsigned int scan_static_bus(device_t bus, unsigned int max);
void enable_childrens_resources(device_t dev);
void root_dev_enable_resources(device_t dev);
unsigned int root_dev_scan_bus(device_t root, unsigned int max);
void root_dev_init(device_t dev);
void root_dev_reset(struct bus *bus);
#endif /* DEVICE_H */

4
src/mainboard/emulation/qemu-x86/northbridge.c
View file

@ -122,8 +122,8 @@ static void cpu_pci_domain_read_resources(struct device *dev)
static struct device_operations pci_domain_ops = {
.read_resources = cpu_pci_domain_read_resources,
.set_resources = cpu_pci_domain_set_resources,
.enable_resources = enable_childrens_resources,
.init = 0,
.enable_resources = NULL,
.init = NULL,
.scan_bus = pci_domain_scan_bus,
};

125
src/mainboard/tyan/s2881/mainboard.c
View file

@ -21,133 +21,8 @@
*/
#include <device/device.h>
#include <console/console.h>
#include <device/smbus.h>
#include "chip.h"
/**
* Do some S2881-specific HWM initialization for the ADT7463 chip.
*
* See Analog Devices ADT7463 datasheet, Rev C (2004):
* http://www.analog.com/en/prod/0,,766_825_ADT7463,00.html
*/
static void adt7463_init(device_t dev)
{
device_t smbus_dev, adt7463;
struct device_path path;
int result;
/* Find the SMBus controller (AMD-8111). */
smbus_dev = dev_find_device(0x1022, 0x746b, 0);
if (!smbus_dev)
die("SMBus controller not found\n");
printk(BIOS_DEBUG, "SMBus controller found\n");
/* Find the ADT7463 device. */
path.type = DEVICE_PATH_I2C;
path.i2c.device = 0x2d;
adt7463 = find_dev_path(smbus_dev->link_list, &path);
if (!adt7463)
die("ADT7463 not found\n");
printk(BIOS_DEBUG, "ADT7463 found\n");
/* Set all fans to 'Fastest Speed Calculated by All 3 Temperature
* Channels Controls PWMx'.
*/
result = smbus_write_byte(adt7463, 0x5c, 0xc2);
result = smbus_write_byte(adt7463, 0x5d, 0xc2);
result = smbus_write_byte(adt7463, 0x5e, 0xc2);
/* Make sure that our fans never stop when temp. falls below Tmin,
* but rather keep going at minimum duty cycle (applies to automatic
* fan control mode only).
*/
result = smbus_write_byte(adt7463, 0x62, 0xc0);
/* Set minimum PWM duty cycle to 25%, rather than the default 50%. */
result = smbus_write_byte(adt7463, 0x64, 0x40);
result = smbus_write_byte(adt7463, 0x65, 0x40);
result = smbus_write_byte(adt7463, 0x66, 0x40);
/* Set Tmin to 55C, rather than the default 90C. Above this temperature
* the fans will start blowing harder as temperature increases
* (automatic mode only).
*/
result = smbus_write_byte(adt7463, 0x67, 0x37);
result = smbus_write_byte(adt7463, 0x68, 0x37);
result = smbus_write_byte(adt7463, 0x69, 0x37);
/* Set THERM limit to 70C, rather than the default 100C.
* The fans will kick in at 100% if the sensors reach this temperature,
* (only in automatic mode, but supposedly even when hardware is
* locked up). This is a failsafe measure.
*/
result = smbus_write_byte(adt7463, 0x6a, 0x46);
result = smbus_write_byte(adt7463, 0x6b, 0x46);
result = smbus_write_byte(adt7463, 0x6c, 0x46);
/* Remote temperature 1 offset (LSB == 0.25C). */
result = smbus_write_byte(adt7463, 0x70, 0x02);
/* Remote temperature 2 offset (LSB == 0.25C). */
result = smbus_write_byte(adt7463, 0x72, 0x01);
/* Set TACH measurements to normal (1/second). */
result = smbus_write_byte(adt7463, 0x78, 0xf0);
printk(BIOS_DEBUG, "ADT7463 properly initialized\n");
}
static void dummy_noop(device_t dummy)
{
}
static struct device_operations dummy_operations = {
.read_resources = dummy_noop,
.set_resources = dummy_noop,
.enable_resources = dummy_noop,
.init = adt7463_init,
};
static unsigned int scan_root_bus(device_t root, unsigned int max)
{
struct device_path path;
device_t dummy;
max = root_dev_scan_bus(root, max);
printk(BIOS_DEBUG, "scan_root_bus ok\n");
/* The following is a little silly. We need a hook into the boot
* process *after* the ADT7463 device has been initialized. So we
* create this dummy device, and we put the ADT7463 S2881 specific
* settings in its init function, which gets called
* as the last device to be initialized.
*/
path.type = DEVICE_PATH_PNP;
path.pnp.port = 0;
path.pnp.device = 0;
dummy = alloc_dev(root->link_list, &path);
dummy->ops = &dummy_operations;
return max;
}
static struct device_operations mainboard_operations = {
.read_resources = root_dev_read_resources,
.set_resources = root_dev_set_resources,
.enable_resources = root_dev_enable_resources,
.init = root_dev_init,
.scan_bus = scan_root_bus,
};
static void enable_dev(struct device *dev)
{
dev->ops = &mainboard_operations;
}
struct chip_operations mainboard_ops = {
CHIP_NAME("Tyan S2881 Mainboard")
.enable_dev = enable_dev,
};

12
src/northbridge/amd/amdfam10/northbridge.c
View file

@ -604,12 +604,6 @@ static void amdfam10_set_resources(device_t dev)
}
}
static void amdfam10_enable_resources(device_t dev)
{
pci_dev_enable_resources(dev);
enable_childrens_resources(dev);
}
static void mcf0_control_init(struct device *dev)
{
}
@ -617,7 +611,7 @@ static void mcf0_control_init(struct device *dev)
static struct device_operations northbridge_operations = {
.read_resources = amdfam10_read_resources,
.set_resources = amdfam10_set_resources,
.enable_resources = amdfam10_enable_resources,
.enable_resources = pci_dev_enable_resources,
.init = mcf0_control_init,
.scan_bus = amdfam10_scan_chains,
.enable = 0,
@ -1145,8 +1139,8 @@ static u32 amdfam10_domain_scan_bus(device_t dev, u32 max)
static struct device_operations pci_domain_ops = {
.read_resources = amdfam10_domain_read_resources,
.set_resources = amdfam10_domain_set_resources,
.enable_resources = enable_childrens_resources,
.init = 0,
.enable_resources = NULL,
.init = NULL,
.scan_bus = amdfam10_domain_scan_bus,
#if CONFIG_MMCONF_SUPPORT_DEFAULT
.ops_pci_bus = &pci_ops_mmconf,

12
src/northbridge/amd/amdk8/northbridge.c
View file

@ -574,12 +574,6 @@ static void amdk8_set_resources(device_t dev)
}
}
static void amdk8_enable_resources(device_t dev)
{
pci_dev_enable_resources(dev);
enable_childrens_resources(dev);
}
static void mcf0_control_init(struct device *dev)
{
#if 0
@ -593,7 +587,7 @@ static void mcf0_control_init(struct device *dev)
static struct device_operations northbridge_operations = {
.read_resources = amdk8_read_resources,
.set_resources = amdk8_set_resources,
.enable_resources = amdk8_enable_resources,
.enable_resources = pci_dev_enable_resources,
.init = mcf0_control_init,
.scan_bus = amdk8_scan_chains,
.enable = 0,
@ -1119,8 +1113,8 @@ static u32 amdk8_domain_scan_bus(device_t dev, u32 max)
static struct device_operations pci_domain_ops = {
.read_resources = amdk8_domain_read_resources,
.set_resources = amdk8_domain_set_resources,
.enable_resources = enable_childrens_resources,
.init = 0,
.enable_resources = NULL,
.init = NULL,
.scan_bus = amdk8_domain_scan_bus,
.ops_pci_bus = &pci_cf8_conf1,
};

4
src/northbridge/amd/gx1/northbridge.c
View file

@ -169,8 +169,8 @@ static void pci_domain_set_resources(device_t dev)
static struct device_operations pci_domain_ops = {
.read_resources = pci_domain_read_resources,
.set_resources = pci_domain_set_resources,
.enable_resources = enable_childrens_resources,
.init = 0,
.enable_resources = NULL,
.init = NULL,
.scan_bus = pci_domain_scan_bus,
};

4
src/northbridge/amd/gx2/northbridge.c
View file

@ -448,8 +448,8 @@ static void pci_domain_set_resources(device_t dev)
static struct device_operations pci_domain_ops = {
.read_resources = pci_domain_read_resources,
.set_resources = pci_domain_set_resources,
.enable_resources = enable_childrens_resources,
.init = 0,
.enable_resources = NULL,
.init = NULL,
.scan_bus = pci_domain_scan_bus,
};

2
src/northbridge/amd/lx/northbridge.c
View file

@ -441,7 +441,7 @@ static void pci_domain_enable(device_t dev)
static struct device_operations pci_domain_ops = {
.read_resources = pci_domain_read_resources,
.set_resources = pci_domain_set_resources,
.enable_resources = enable_childrens_resources,
.enable_resources = NULL,
.scan_bus = pci_domain_scan_bus,
.enable = pci_domain_enable,
};

4
src/northbridge/intel/e7501/northbridge.c
View file

@ -141,8 +141,8 @@ static void pci_domain_set_resources(device_t dev)
static struct device_operations pci_domain_ops = {
.read_resources = pci_domain_read_resources,
.set_resources = pci_domain_set_resources,
.enable_resources = enable_childrens_resources,
.init = 0,
.enable_resources = NULL,
.init = NULL,
.scan_bus = pci_domain_scan_bus,
.ops_pci_bus = &pci_cf8_conf1,
};

4
src/northbridge/intel/e7520/northbridge.c
View file

@ -163,8 +163,8 @@ static u32 e7520_domain_scan_bus(device_t dev, u32 max)
static struct device_operations pci_domain_ops = {
.read_resources = pci_domain_read_resources,
.set_resources = pci_domain_set_resources,
.enable_resources = enable_childrens_resources,
.init = 0,
.enable_resources = NULL,
.init = NULL,
.scan_bus = e7520_domain_scan_bus,
.ops_pci_bus = &pci_cf8_conf1, /* Do we want to use the memory mapped space here? */
};

4
src/northbridge/intel/e7525/northbridge.c
View file

@ -163,8 +163,8 @@ static u32 e7525_domain_scan_bus(device_t dev, u32 max)
static struct device_operations pci_domain_ops = {
.read_resources = pci_domain_read_resources,
.set_resources = pci_domain_set_resources,
.enable_resources = enable_childrens_resources,
.init = 0,
.enable_resources = NULL,
.init = NULL,
.scan_bus = e7525_domain_scan_bus,
.ops_pci_bus = &pci_cf8_conf1, /* Do we want to use the memory mapped space here? */
};

4
src/northbridge/intel/i3100/northbridge.c
View file

@ -184,8 +184,8 @@ static u32 i3100_domain_scan_bus(device_t dev, u32 max)
static struct device_operations pci_domain_ops = {
.read_resources = pci_domain_read_resources,
.set_resources = pci_domain_set_resources,
.enable_resources = enable_childrens_resources,
.init = 0,
.enable_resources = NULL,
.init = NULL,
.scan_bus = i3100_domain_scan_bus,
.ops_pci_bus = &pci_cf8_conf1, /* Do we want to use the memory mapped space here? */
};

1
src/northbridge/intel/i3100/pciexp_porta_ep80579.c
View file

@ -64,7 +64,6 @@ static void pcie_bus_enable_resources(struct device *dev)
dev->command |= PCI_COMMAND_MEMORY;
}
pci_dev_enable_resources(dev);
enable_childrens_resources(dev);
}

4
src/northbridge/intel/i440bx/northbridge.c
View file

@ -124,8 +124,8 @@ static void i440bx_domain_set_resources(device_t dev)
static struct device_operations pci_domain_ops = {
.read_resources = pci_domain_read_resources,
.set_resources = i440bx_domain_set_resources,
.enable_resources = enable_childrens_resources,
.init = 0,
.enable_resources = NULL,
.init = NULL,
.scan_bus = pci_domain_scan_bus,
};

4
src/northbridge/intel/i440lx/northbridge.c
View file

@ -152,8 +152,8 @@ static void i440lx_domain_set_resources(device_t dev)
static struct device_operations pci_domain_ops = {
.read_resources = pci_domain_read_resources,
.set_resources = i440lx_domain_set_resources,
.enable_resources = enable_childrens_resources,
.init = 0,
.enable_resources = NULL,
.init = NULL,
.scan_bus = pci_domain_scan_bus,
};

4
src/northbridge/intel/i82810/northbridge.c
View file

@ -184,8 +184,8 @@ static void pci_domain_set_resources(device_t dev)
static struct device_operations pci_domain_ops = {
.read_resources = pci_domain_read_resources,
.set_resources = pci_domain_set_resources,
.enable_resources = enable_childrens_resources,
.init = 0,
.enable_resources = NULL,
.init = NULL,
.scan_bus = pci_domain_scan_bus,
};

4
src/northbridge/intel/i82830/northbridge.c
View file

@ -164,8 +164,8 @@ static void pci_domain_set_resources(device_t dev)
static struct device_operations pci_domain_ops = {
.read_resources = pci_domain_read_resources,
.set_resources = pci_domain_set_resources,
.enable_resources = enable_childrens_resources,
.init = 0,
.enable_resources = NULL,
.init = NULL,
.scan_bus = pci_domain_scan_bus,
};

4
src/northbridge/intel/i855/northbridge.c
View file

@ -140,8 +140,8 @@ static void pci_domain_set_resources(device_t dev)
static struct device_operations pci_domain_ops = {
.read_resources = pci_domain_read_resources,
.set_resources = pci_domain_set_resources,
.enable_resources = enable_childrens_resources,
.init = 0,
.enable_resources = NULL,
.init = NULL,
.scan_bus = pci_domain_scan_bus,
};

4
src/northbridge/intel/i945/northbridge.c
View file

@ -224,8 +224,8 @@ static void pci_domain_set_resources(device_t dev)
static struct device_operations pci_domain_ops = {
.read_resources = pci_domain_read_resources,
.set_resources = pci_domain_set_resources,
.enable_resources = enable_childrens_resources,
.init = 0,
.enable_resources = NULL,
.init = NULL,
.scan_bus = pci_domain_scan_bus,
#if CONFIG_MMCONF_SUPPORT_DEFAULT
.ops_pci_bus = &pci_ops_mmconf,

4
src/northbridge/via/cn400/northbridge.c
View file

@ -283,8 +283,8 @@ static unsigned int cn400_domain_scan_bus(device_t dev, unsigned int max)
static struct device_operations pci_domain_ops = {
.read_resources = cn400_domain_read_resources,
.set_resources = cn400_domain_set_resources,
.enable_resources = enable_childrens_resources,
.init = 0,
.enable_resources = NULL,
.init = NULL,
.scan_bus = cn400_domain_scan_bus,
};

4
src/northbridge/via/cn700/northbridge.c
View file

@ -205,8 +205,8 @@ static void pci_domain_set_resources(device_t dev)
static struct device_operations pci_domain_ops = {
.read_resources = pci_domain_read_resources,
.set_resources = pci_domain_set_resources,
.enable_resources = enable_childrens_resources,
.init = 0,
.enable_resources = NULL,
.init = NULL,
.scan_bus = pci_domain_scan_bus,
};

1
src/northbridge/via/cx700/cx700_lpc.c
View file

@ -270,7 +270,6 @@ static void cx700_enable_resources(device_t dev)
{
/* Enable SuperIO decoding */
pci_dev_enable_resources(dev);
enable_childrens_resources(dev);
}
static void cx700_lpc_init(struct device *dev)

4
src/northbridge/via/cx700/northbridge.c
View file

@ -134,8 +134,8 @@ static void pci_domain_set_resources(device_t dev)
static struct device_operations pci_domain_ops = {
.read_resources = pci_domain_read_resources,
.set_resources = pci_domain_set_resources,
.enable_resources = enable_childrens_resources,
.init = 0,
.enable_resources = NULL,
.init = NULL,
.scan_bus = pci_domain_scan_bus,
};

4
src/northbridge/via/vt8601/northbridge.c
View file

@ -146,8 +146,8 @@ static void pci_domain_set_resources(device_t dev)
static struct device_operations pci_domain_ops = {
.read_resources = pci_domain_read_resources,
.set_resources = pci_domain_set_resources,
.enable_resources = enable_childrens_resources,
.init = 0,
.enable_resources = NULL,
.init = NULL,
.scan_bus = pci_domain_scan_bus,
};

4
src/northbridge/via/vt8623/northbridge.c
View file

@ -207,8 +207,8 @@ static void pci_domain_set_resources(device_t dev)
static struct device_operations pci_domain_ops = {
.read_resources = pci_domain_read_resources,
.set_resources = pci_domain_set_resources,
.enable_resources = enable_childrens_resources,
.init = 0,
.enable_resources = NULL,
.init = NULL,
.scan_bus = pci_domain_scan_bus,
};

4
src/northbridge/via/vx800/northbridge.c
View file

@ -181,8 +181,8 @@ if register with invalid value we set frame buffer size to 32M for default, but
static struct device_operations pci_domain_ops = {
.read_resources = pci_domain_read_resources,
.set_resources = pci_domain_set_resources,
.enable_resources = enable_childrens_resources,
.init = 0,
.enable_resources = NULL,
.init = NULL,
.scan_bus = pci_domain_scan_bus,
};

14
src/northbridge/via/vx800/vx800_lpc.c
View file

@ -322,16 +322,6 @@ static void vx800_set_resources(device_t dev)
pci_dev_set_resources(dev);
}
static void vx800_enable_resources(device_t dev)
{
/* vx800 is not a pci bridge and has no resources of its own (other than
standard PC i/o addresses). however it does control the isa bus and so
we need to manually call enable childrens resources on that bus */
/* TODO: do we even care about ISA? If so, for what? SuperIO on LPC bus */
pci_dev_enable_resources(dev);
enable_childrens_resources(dev);
}
static void southbridge_init(struct device *dev)
{
printk(BIOS_DEBUG, "vx800 sb init\n");
@ -375,8 +365,8 @@ static void southbridge_init(struct device *dev)
static struct device_operations vx800_lpc_ops = {
.read_resources = vx800_read_resources,
.set_resources = vx800_set_resources,
.enable_resources = vx800_enable_resources,
.init = &southbridge_init,
.enable_resources = pci_dev_enable_resources,
.init = southbridge_init,
.scan_bus = scan_static_bus,
};

8
src/southbridge/amd/amd8111/amd8111_lpc.c
View file

@ -106,12 +106,6 @@ static void amd8111_lpc_read_resources(device_t dev)
res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
}
static void amd8111_lpc_enable_resources(device_t dev)
{
pci_dev_enable_resources(dev);
enable_childrens_resources(dev);
}
static void lpci_set_subsystem(device_t dev, unsigned vendor, unsigned device)
{
pci_write_config32(dev, 0x70,
@ -125,7 +119,7 @@ static struct pci_operations lops_pci = {
static struct device_operations lpc_ops = {
.read_resources = amd8111_lpc_read_resources,
.set_resources = pci_dev_set_resources,
.enable_resources = amd8111_lpc_enable_resources,
.enable_resources = pci_dev_enable_resources,
.init = lpc_init,
.scan_bus = scan_static_bus,
.enable = amd8111_enable,

9
src/southbridge/amd/cs5530/cs5530_isa.c
View file

@ -47,17 +47,10 @@ static void isa_init(struct device *dev)
{
}
static void cs5530_pci_dev_enable_resources(device_t dev)
{
// TODO: Needed?
pci_dev_enable_resources(dev);
enable_childrens_resources(dev);
}
static struct device_operations isa_ops = {
.read_resources = cs5530_read_resources,
.set_resources = pci_dev_set_resources,
.enable_resources = cs5530_pci_dev_enable_resources,
.enable_resources = pci_dev_enable_resources,
.init = isa_init,
.enable = 0,
.scan_bus = scan_static_bus,

9
src/southbridge/amd/cs5535/cs5535.c
View file

@ -87,17 +87,10 @@ static void cs5535_read_resources(device_t dev)
res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
}
static void cs5535_pci_dev_enable_resources(device_t dev)
{
printk(BIOS_DEBUG, "%s()\n", __func__);
pci_dev_enable_resources(dev);
enable_childrens_resources(dev);
}
static struct device_operations southbridge_ops = {
.read_resources = cs5535_read_resources,
.set_resources = pci_dev_set_resources,
.enable_resources = cs5535_pci_dev_enable_resources,
.enable_resources = pci_dev_enable_resources,
.init = southbridge_init,
.enable = southbridge_enable,
.scan_bus = scan_static_bus,

9
src/southbridge/amd/cs5536/cs5536.c
View file

@ -667,17 +667,10 @@ static void southbridge_enable(struct device *dev)
}
static void cs5536_pci_dev_enable_resources(device_t dev)
{
printk(BIOS_DEBUG, "%s()\n", __func__);
pci_dev_enable_resources(dev);
enable_childrens_resources(dev);
}
static struct device_operations southbridge_ops = {
.read_resources = cs5536_read_resources,
.set_resources = pci_dev_set_resources,
.enable_resources = cs5536_pci_dev_enable_resources,
.enable_resources = pci_dev_enable_resources,
.init = southbridge_init,
// .enable = southbridge_enable,
.scan_bus = scan_static_bus,

8
src/southbridge/amd/sb600/sb600_lpc.c
View file

@ -96,13 +96,6 @@ static void sb600_lpc_read_resources(device_t dev)
*
* @param dev the device whos children's resources are to be enabled
*
* This function is call by the global enable_resources() indirectly via the
* device_operation::enable_resources() method of devices.
*
* Indirect mutual recursion:
* enable_childrens_resources() -> enable_resources()
* enable_resources() -> device_operation::enable_resources()
* device_operation::enable_resources() -> enable_children_resources()
*/
static void sb600_lpc_enable_childrens_resources(device_t dev)
{
@ -118,7 +111,6 @@ static void sb600_lpc_enable_childrens_resources(device_t dev)
device_t child;
for (child = link->children; child;
child = child->sibling) {
enable_resources(child);
if (child->enabled
&& (child->path.type == DEVICE_PATH_PNP)) {
struct resource *res;

8
src/southbridge/amd/sb700/sb700_lpc.c
View file

@ -108,13 +108,6 @@ static void sb700_lpc_set_resources(struct device *dev)
*
* @param dev the device whos children's resources are to be enabled
*
* This function is call by the global enable_resources() indirectly via the
* device_operation::enable_resources() method of devices.
*
* Indirect mutual recursion:
* enable_childrens_resources() -> enable_resources()
* enable_resources() -> device_operation::enable_resources()
* device_operation::enable_resources() -> enable_children_resources()
*/
static void sb700_lpc_enable_childrens_resources(device_t dev)
{
@ -130,7 +123,6 @@ static void sb700_lpc_enable_childrens_resources(device_t dev)
device_t child;
for (child = link->children; child;
child = child->sibling) {
enable_resources(child);
if (child->enabled
&& (child->path.type == DEVICE_PATH_PNP)) {
struct resource *res;

8
src/southbridge/broadcom/bcm5785/bcm5785_lpc.c
View file

@ -57,13 +57,6 @@ static void bcm5785_lpc_read_resources(device_t dev)
*
* @param dev the device whos children's resources are to be enabled
*
* This function is call by the global enable_resources() indirectly via the
* device_operation::enable_resources() method of devices.
*
* Indirect mutual recursion:
* enable_childrens_resources() -> enable_resources()
* enable_resources() -> device_operation::enable_resources()
* device_operation::enable_resources() -> enable_children_resources()
*/
static void bcm5785_lpc_enable_childrens_resources(device_t dev)
{
@ -75,7 +68,6 @@ static void bcm5785_lpc_enable_childrens_resources(device_t dev)
for (link = dev->link_list; link; link = link->next) {
device_t child;
for (child = link->children; child; child = child->sibling) {
enable_resources(child);
if(child->enabled && (child->path.type == DEVICE_PATH_PNP)) {
struct resource *res;
for(res = child->resource_list; res; res = res->next) {

2
src/southbridge/intel/esb6300/esb6300_lpc.c
View file

@ -351,8 +351,6 @@ static void esb6300_lpc_enable_resources(device_t dev)
gpio_cntl = pci_read_config8(dev, 0x5c);
gpio_cntl |= (1 << 4);
pci_write_config8(dev, 0x5c, gpio_cntl);
enable_childrens_resources(dev);
}
static struct pci_operations lops_pci = {

2
src/southbridge/intel/i3100/i3100_lpc.c
View file

@ -404,8 +404,6 @@ static void i3100_lpc_enable_resources(device_t dev)
/* Enable the RCBA */
pci_write_config32(dev, RCBA, pci_read_config32(dev, RCBA) | (1 << 0));
enable_childrens_resources(dev);
}
static struct pci_operations lops_pci = {

8
src/southbridge/intel/i82801ax/i82801ax_lpc.c
View file

@ -332,16 +332,10 @@ static void i82801ax_lpc_read_resources(device_t dev)
res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
}
static void i82801ax_lpc_enable_resources(device_t dev)
{
pci_dev_enable_resources(dev);
enable_childrens_resources(dev);
}
static struct device_operations lpc_ops = {
.read_resources = i82801ax_lpc_read_resources,
.set_resources = pci_dev_set_resources,
.enable_resources = i82801ax_lpc_enable_resources,
.enable_resources = pci_dev_enable_resources,
.init = lpc_init,
.scan_bus = scan_static_bus,
.enable = i82801ax_enable,

8
src/southbridge/intel/i82801bx/i82801bx_lpc.c
View file

@ -332,16 +332,10 @@ static void i82801bx_lpc_read_resources(device_t dev)
res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
}
static void i82801bx_lpc_enable_resources(device_t dev)
{
pci_dev_enable_resources(dev);
enable_childrens_resources(dev);
}
static struct device_operations lpc_ops = {
.read_resources = i82801bx_lpc_read_resources,
.set_resources = pci_dev_set_resources,
.enable_resources = i82801bx_lpc_enable_resources,
.enable_resources = pci_dev_enable_resources,
.init = lpc_init,
.scan_bus = scan_static_bus,
.enable = i82801bx_enable,

8
src/southbridge/intel/i82801cx/i82801cx_lpc.c
View file

@ -229,16 +229,10 @@ static void i82801cx_lpc_read_resources(device_t dev)
res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
}
static void i82801cx_lpc_enable_resources(device_t dev)
{
pci_dev_enable_resources(dev);
enable_childrens_resources(dev);
}
static struct device_operations lpc_ops = {
.read_resources = i82801cx_lpc_read_resources,
.set_resources = pci_dev_set_resources,
.enable_resources = i82801cx_lpc_enable_resources,
.enable_resources = pci_dev_enable_resources,
.init = lpc_init,
.scan_bus = scan_static_bus,
.enable = 0,

8
src/southbridge/intel/i82801dx/i82801dx_lpc.c
View file

@ -322,16 +322,10 @@ static void i82801dx_lpc_read_resources(device_t dev)
res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
}
static void i82801dx_lpc_enable_resources(device_t dev)
{
pci_dev_enable_resources(dev);
enable_childrens_resources(dev);
}
static struct device_operations lpc_ops = {
.read_resources = i82801dx_lpc_read_resources,
.set_resources = pci_dev_set_resources,
.enable_resources = i82801dx_lpc_enable_resources,
.enable_resources = pci_dev_enable_resources,
.init = lpc_init,
.scan_bus = scan_static_bus,
.enable = i82801dx_enable,

2
src/southbridge/intel/i82801ex/i82801ex_lpc.c
View file

@ -335,8 +335,6 @@ static void i82801ex_lpc_enable_resources(device_t dev)
gpio_cntl = pci_read_config8(dev, 0x5c);
gpio_cntl |= (1 << 4);
pci_write_config8(dev, 0x5c, gpio_cntl);
enable_childrens_resources(dev);
}
static struct pci_operations lops_pci = {

8
src/southbridge/intel/i82801gx/i82801gx_lpc.c
View file

@ -481,12 +481,6 @@ static void i82801gx_lpc_read_resources(device_t dev)
res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
}
static void i82801gx_lpc_enable_resources(device_t dev)
{
pci_dev_enable_resources(dev);
enable_childrens_resources(dev);
}
static void set_subsystem(device_t dev, unsigned vendor, unsigned device)
{
if (!vendor || !device) {
@ -505,7 +499,7 @@ static struct pci_operations pci_ops = {
static struct device_operations device_ops = {
.read_resources = i82801gx_lpc_read_resources,
.set_resources = pci_dev_set_resources,
.enable_resources = i82801gx_lpc_enable_resources,
.enable_resources = pci_dev_enable_resources,
.init = lpc_init,
.scan_bus = scan_static_bus,
.enable = i82801gx_enable,

2
src/southbridge/intel/i82801gx/i82801gx_pci.c
View file

@ -110,8 +110,6 @@ static void ich_pci_bus_enable_resources(struct device *dev)
/* This is the reason we need our own pci_bus_enable_resources */
ich_pci_dev_enable_resources(dev);
enable_childrens_resources(dev);
}
static void set_subsystem(device_t dev, unsigned vendor, unsigned device)

7
src/southbridge/nvidia/ck804/ck804_lpc.c
View file

@ -222,12 +222,6 @@ static void ck804_lpc_read_resources(device_t dev)
* This function is called by the global enable_resources() indirectly via the
* device_operation::enable_resources() method of devices.
*
* Indirect mutual recursion:
* enable_childrens_resources() -> enable_resources()
* enable_resources() -> device_operation::enable_resources()
* device_operation::enable_resources() -> enable_children_resources()
*
* @param dev The device whose children's resources are to be enabled.
*/
static void ck804_lpc_enable_childrens_resources(device_t dev)
{
@ -240,7 +234,6 @@ static void ck804_lpc_enable_childrens_resources(device_t dev)
for (link = dev->link_list; link; link = link->next) {
device_t child;
for (child = link->children; child; child = child->sibling) {
enable_resources(child);
if (child->enabled && (child->path.type == DEVICE_PATH_PNP)) {
struct resource *res;
for (res = child->resource_list; res; res = res->next) {

8
src/southbridge/nvidia/mcp55/mcp55_lpc.c
View file

@ -195,13 +195,6 @@ static void mcp55_lpc_read_resources(device_t dev)
*
* @param dev the device whos children's resources are to be enabled
*
* This function is called by the global enable_resources() indirectly via the
* device_operation::enable_resources() method of devices.
*
* Indirect mutual recursion:
* enable_childrens_resources() -> enable_resources()
* enable_resources() -> device_operation::enable_resources()
* device_operation::enable_resources() -> enable_children_resources()
*/
static void mcp55_lpc_enable_childrens_resources(device_t dev)
{
@ -215,7 +208,6 @@ static void mcp55_lpc_enable_childrens_resources(device_t dev)
for (link = dev->link_list; link; link = link->next) {
device_t child;
for (child = link->children; child; child = child->sibling) {
enable_resources(child);
if(child->enabled && (child->path.type == DEVICE_PATH_PNP)) {
struct resource *res;
for(res = child->resource_list; res; res = res->next) {

8
src/southbridge/sis/sis966/sis966_lpc.c
View file

@ -188,13 +188,6 @@ static void sis966_lpc_read_resources(device_t dev)
*
* @param dev the device whos children's resources are to be enabled
*
* This function is call by the global enable_resources() indirectly via the
* device_operation::enable_resources() method of devices.
*
* Indirect mutual recursion:
* enable_childrens_resources() -> enable_resources()
* enable_resources() -> device_operation::enable_resources()
* device_operation::enable_resources() -> enable_children_resources()
*/
static void sis966_lpc_enable_childrens_resources(device_t dev)
{
@ -208,7 +201,6 @@ static void sis966_lpc_enable_childrens_resources(device_t dev)
for (link = dev->link_list; link; link = link->next) {
device_t child;
for (child = link->children; child; child = child->sibling) {
enable_resources(child);
if(child->enabled && (child->path.type == DEVICE_PATH_PNP)) {
struct resource *res;
for(res = child->resource_list; res; res = res->next) {

12
src/southbridge/via/vt8235/vt8235_lpc.c
View file

@ -241,14 +241,6 @@ static void vt8235_set_resources(device_t dev)
pci_dev_set_resources(dev);
}
static void vt8235_enable_resources(device_t dev)
{
/* vt8235 is not a pci bridge and has no resources of its own (other than standard PC i/o addresses)
however it does control the isa bus and so we need to manually call enable childrens resources on that bus */
pci_dev_enable_resources(dev);
enable_childrens_resources(dev);
}
static void southbridge_init(struct device *dev)
{
vt8235_init(dev);
@ -258,8 +250,8 @@ static void southbridge_init(struct device *dev)
static struct device_operations vt8235_lpc_ops = {
.read_resources = vt8235_read_resources,
.set_resources = vt8235_set_resources,
.enable_resources = vt8235_enable_resources,
.init = &southbridge_init,
.enable_resources = pci_dev_enable_resources,
.init = southbridge_init,
.scan_bus = scan_static_bus,
};

19
src/southbridge/via/vt8237r/vt8237r_lpc.c
View file

@ -505,17 +505,6 @@ static void vt8237r_read_resources(device_t dev)
res->flags = IORESOURCE_IO | IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
}
/**
* The VT8237R is not a PCI bridge and has no resources of its own (other
* than standard PC I/O addresses), however it does control the ISA bus
* and so we need to manually call enable childrens resources on that bus.
*/
static void vt8237r_enable_resources(device_t dev)
{
pci_dev_enable_resources(dev);
enable_childrens_resources(dev);
}
static void init_keyboard(struct device *dev)
{
u8 regval = pci_read_config8(dev, 0x51);
@ -535,16 +524,16 @@ static void southbridge_init_common(struct device *dev)
static const struct device_operations vt8237r_lpc_ops_s = {
.read_resources = vt8237r_read_resources,
.set_resources = pci_dev_set_resources,
.enable_resources = vt8237r_enable_resources,
.init = &vt8237s_init,
.enable_resources = pci_dev_enable_resources,
.init = vt8237s_init,
.scan_bus = scan_static_bus,
};
static const struct device_operations vt8237r_lpc_ops_r = {
.read_resources = vt8237r_read_resources,
.set_resources = pci_dev_set_resources,
.enable_resources = vt8237r_enable_resources,
.init = &vt8237r_init,
.enable_resources = pci_dev_enable_resources,
.init = vt8237r_init,
.scan_bus = scan_static_bus,
};