soc/intel/tigerlake: Correct number of gpio group for Jasper Lake

Correct number of gpio pad group for Jasper Lake SoC.

BUG=None
BRANCH=None
Test=Code compilation for Jasper Lake RVP

Change-Id: I381d0e48430e933569a3b22b66b4e6077383e9e2
Signed-off-by: Maulik V Vaghela <maulik.v.vaghela@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39604
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aamir Bohra <aamir.bohra@intel.com>

src/soc/intel/tigerlake/include/soc/gpio_soc_defs_jsl.h

@@ -34,7 +34,7 @@
 #define GPP_GPD			0xA
 #define GPP_E			0xD
 
-#define GPIO_NUM_GROUPS		11
+#define GPIO_NUM_GROUPS		12
 #define GPIO_MAX_NUM_PER_GROUP	24
 
 /*