soc/intel/skylake: move/rename files after drop of FSP 1.1

Follow-up commit where only files are moved and paths adapted to make
review of the previous commit easier.

Change-Id: Iff1acbd286c2ba8e6613e866d4e2f893562e8973
Signed-off-by: Michael Niewöhner <foss@mniewoehner.de>
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35868
Reviewed-by: Michael Niewöhner
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Michael Niewöhner 2019-10-08 00:30:38 +02:00 committed by Nico Huber
parent fa62e01b90
commit 7ef19036fb
8 changed files with 3 additions and 6 deletions

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@ -29,5 +29,3 @@ ramstage-y += mainboard.c
ramstage-y += ramstage.c
smm-y += smihandler.c
romstage-srcs := $(subst $(MAINBOARDDIR)/romstage.c,$(MAINBOARDDIR)/romstage_fsp20.c,$(romstage-srcs))

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@ -42,7 +42,7 @@ romstage-y += spi.c
romstage-y += uart.c
ramstage-$(CONFIG_HAVE_ACPI_TABLES) += acpi.c
ramstage-y += chip_fsp20.c
ramstage-y += chip.c
ramstage-y += cpu.c
ramstage-y += elog.c
ramstage-y += finalize.c
@ -100,7 +100,6 @@ endif
CPPFLAGS_common += -I$(src)/soc/intel/skylake
CPPFLAGS_common += -I$(src)/soc/intel/skylake/include
CPPFLAGS_common += -I$(src)/soc/intel/skylake/include/fsp20
# Currently used for microcode path.
CPPFLAGS_common += -I3rdparty/blobs/mainboard/$(MAINBOARDDIR)

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@ -21,7 +21,7 @@
#include <fsp/api.h>
#include <fsp/util.h>
#include "../../../chip.h"
#include "../../chip.h"
#define FSP_SIL_UPD FSP_S_CONFIG
#define FSP_MEM_UPD FSP_M_CONFIG

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@ -1,3 +1,3 @@
romstage-y += ../../../../cpu/intel/car/romstage.c
romstage-y += romstage_fsp20.c
romstage-y += romstage.c
romstage-y += systemagent.c