tegra124: Add a custom bootblock implementation.
This implementation is the same as the general one except that it removes all the things that don't work on an ARMv4. Change-Id: I1108a79cc656b26f7d48df20aef3016cf5ae3182 Signed-off-by: Gabe Black <gabeblack@google.com> Reviewed-on: https://chromium-review.googlesource.com/171019 Reviewed-by: Ronald Minnich <rminnich@chromium.org> Commit-Queue: Gabe Black <gabeblack@chromium.org> Tested-by: Gabe Black <gabeblack@chromium.org> (cherry picked from commit d1436288d3b025af27a8d28ba94b589940ead504) Signed-off-by: Isaac Christensen <isaac.christensen@se-eng.com> Reviewed-on: http://review.coreboot.org/6713 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
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@ -2,9 +2,9 @@ config SOC_NVIDIA_TEGRA124
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select ARCH_BOOTBLOCK_ARMV7
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select ARCH_BOOTBLOCK_ARMV7
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select ARCH_ROMSTAGE_ARMV7
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select ARCH_ROMSTAGE_ARMV7
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select ARCH_RAMSTAGE_ARMV7
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select ARCH_RAMSTAGE_ARMV7
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select ARM_BOOTBLOCK_CUSTOM
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bool
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bool
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default n
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default n
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select CPU_HAS_BOOTBLOCK_INIT
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if SOC_NVIDIA_TEGRA124
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if SOC_NVIDIA_TEGRA124
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@ -1,6 +1,10 @@
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CBOOTIMAGE = cbootimage
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CBOOTIMAGE = cbootimage
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bootblock-c-ccopts += -marm
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bootblock-S-ccopts += -marm
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bootblock-y += bootblock.c
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bootblock-y += bootblock.c
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bootblock-y += bootblock_asm.S
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bootblock-y += cbfs.c
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bootblock-y += cbfs.c
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bootblock-y += clock.c
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bootblock-y += clock.c
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bootblock-y += i2c.c
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bootblock-y += i2c.c
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@ -17,8 +17,20 @@
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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*/
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#include <bootblock_common.h>
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#include <arch/hlt.h>
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#include <arch/stages.h>
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#include <cbfs.h>
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#include <console/console.h>
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void bootblock_cpu_init(void)
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void main(void)
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{
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{
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void *entry;
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if (CONFIG_BOOTBLOCK_CONSOLE)
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console_init();
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entry = cbfs_load_stage(CBFS_DEFAULT_MEDIA, "fallback/romstage");
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if (entry) stage_exit(entry);
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hlt();
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}
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}
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@ -0,0 +1,98 @@
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/*
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* Early initialization code for ARMv7 architecture.
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*
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* This file is based off of the OMAP3530/ARM Cortex start.S file from Das
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* U-Boot, which itself got the file from armboot.
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*
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* Copyright (c) 2004 Texas Instruments <r-woodruff2@ti.com>
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* Copyright (c) 2001 Marius Gröger <mag@sysgo.de>
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* Copyright (c) 2002 Alex Züpke <azu@sysgo.de>
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* Copyright (c) 2002 Gary Jennejohn <garyj@denx.de>
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* Copyright (c) 2003 Richard Woodruff <r-woodruff2@ti.com>
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* Copyright (c) 2003 Kshitij <kshitij@ti.com>
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* Copyright (c) 2006-2008 Syed Mohammed Khasim <x0khasim@ti.com>
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* Copyright (c) 2013 The Chromium OS Authors
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; version 2 of
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* the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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.section ".start", "a", %progbits
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.globl _start
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_start: b reset
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.balignl 16,0xdeadbeef
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_cbfs_master_header:
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/* The CBFS master header is inserted by cbfstool at the first
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* aligned offset after the above anchor string is found.
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* Hence, we leave some space for it.
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*/
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.skip 128 @ Assumes 64-byte alignment
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reset:
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/*
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* Set the cpu to System mode with IRQ and FIQ disabled. Prefetch/Data
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* aborts may happen early and crash before the abort handlers are
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* installed, but at least the problem will show up near the code that
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* causes it.
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*/
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msr cpsr_cxf, #0xdf
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/*
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* Initialize the stack to a known value. This is used to check for
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* stack overflow later in the boot process.
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*/
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ldr r0, .Stack
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ldr r1, .Stack_size
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sub r0, r0, r1
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ldr r1, .Stack
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ldr r2, =0xdeadbeef
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init_stack_loop:
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str r2, [r0]
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add r0, #4
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cmp r0, r1
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bne init_stack_loop
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/* Set stackpointer in internal RAM to call board_init_f */
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call_bootblock:
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ldr sp, .Stack /* Set up stack pointer */
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ldr r0,=0x00000000
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/*
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* The current design of cpu_info places the
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* struct at the top of the stack. The number of
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* words pushed must be at least as large as that
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* struct.
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*/
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push {r0-r2}
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bic sp, sp, #7 /* 8-byte alignment for ABI compliance */
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/*
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* Use "bl" instead of "b" even though we do not intend to return.
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* "bl" gets compiled to "blx" if we're transitioning from ARM to
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* Thumb. However, "b" will not and GCC may attempt to create a
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* wrapper which is currently broken.
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*/
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bl main
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/* we do it this way because it's a 32-bit constant and
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* in some cases too far away to be loaded as just an offset
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* from IP
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*/
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.align 2
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.Stack:
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.word CONFIG_STACK_TOP
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.align 2
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/* create this size the same way we do in coreboot_ram.ld: top-bottom */
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.Stack_size:
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.word CONFIG_STACK_TOP - CONFIG_STACK_BOTTOM
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